Inventor

CHONG YEW KEONG

US95 patents

⚠️ This page may combine multiple inventors who share the name “CHONG YEW KEONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHONG YEW KEONG

ADVANCED RISC MACH LTD

Memory device and method of operation of such a memory device

Ternary content addressable memory

Computer implemented system and method for generating a layout of a cell defining a circuit component

Bitcell architecture with buried ground rail

Buried metal technique for critical signal nets

Apparatus and method to access a memory location

Method and apparatus for controlling a voltage level

Memory device and method of controlling leakage current within such a memory device

Memory circuitry using write assist voltage boost

Memory having power saving mode

Supporting scan functions within memories

Computer implemented system and method for generating a layout of a cell defining a circuit component

Cell architecture

Computer implemented system and method for generating a layout of a cell defining a circuit component

Multi-port memory circuitry

Memory with multiple write ports

Test techniques in memory devices

Configurable integrated circuits

Memory structure with multi-cell poly pitch

Memory circuitry using write assist voltage boost

Power-gating techniques with buried metal

Read and write techniques

Control architecture for column decoder circuitry

Segmented memory instances

Write assist circuitry

Read assist circuitry for memory applications

Double pumped memory techniques

Read assist circuitry for memory applications

Memory clock generator having multiple clock modes

Buried signal wires for memory applications

Metal routing techniques

Multi-port memory architecture

Circuitry for memory address collision prevention

Memory architecture with DC biasing

Column redundancy techniques

Flexible sizing and routing architecture

Pulse stretcher circuitry

Memory multiplexing techniques

Bitcell with multiple read bitlines

Configurable control of integrated circuits

Backside power supply techniques

Wordline modulation techniques

Frontside-to-backside intermixing architecture for coupling a frontside network to a backside network

Data compressor logic circuit

INTEGRATED DEVICE TECH

Impedance-matched output driver circuits having linear characteristics and enhanced coarse and fine tuning control

Impedance-matched output driver circuits having coarse and fine tuning control

Resistive decoupling of function selection signals from input multiplexers in arithmetic logical units ALU

CHONG YEW KEONG

Word line and power conductor within a metal layer of a memory cell

IDGUNJI SACHIN SATISH

Improving read stability of a semiconductor memory

FREDERICK MARLIN

Decoupling capacitors