Inventor
AKARVARDAR MURAT KEREM
TW51 patents
⚠️ This page may combine multiple inventors who share the name “AKARVARDAR MURAT KEREM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GLOBALFOUNDRIES INC
43 patentsUS9929157B1Mar 27, 2018
Tall single-fin fin-type field effect transistor structures and methods
GLOBALFOUNDRIES INC37 citations94
US9343300B1May 17, 2016
Methods of forming source/drain regions for a PMOS transistor device with a germanium-containing channel region
GLOBALFOUNDRIES INC45 citations94
US9165837B1Oct 20, 2015
Method to form defect free replacement fins by H2 anneal
GLOBALFOUNDRIES INC35 citations94
US9147616B1Sep 29, 2015
Methods of forming isolated fins for a FinFET semiconductor device with alternative channel materials
GLOBALFOUNDRIES INC16 citations93
US9716174B2Jul 25, 2017
Electrical isolation of FinFET active region by selective oxidation of sacrificial layer
GLOBALFOUNDRIES INC10 citations84
US9601383B1Mar 21, 2017
FinFET fabrication by forming isolation trenches prior to fin formation
GLOBALFOUNDRIES INC9 citations84
US9576857B1Feb 21, 2017
Method and structure for SRB elastic relaxation
GLOBALFOUNDRIES INC14 citations84
US9324617B1Apr 26, 2016
Methods of forming elastically relaxed SiGe virtual substrates on bulk silicon
GLOBALFOUNDRIES INC9 citations84
US9224865B2Dec 29, 2015
FinFET with insulator under channel
GLOBALFOUNDRIES INC13 citations84
US9117875B2Aug 25, 2015
Methods of forming isolated germanium-containing fins for a FinFET semiconductor device
GLOBALFOUNDRIES INC14 citations84
US9006077B2Apr 14, 2015
Gate length independent silicon-on-nothing (SON) scheme for bulk FinFETs
GLOBALFOUNDRIES INC14 citations84
US10297597B2May 21, 2019
Composite isolation structures for a fin-type field effect transistor
GLOBALFOUNDRIES INC5 citations73
US10062617B2Aug 28, 2018
Method and structure for SRB elastic relaxation
GLOBALFOUNDRIES INC3 citations73
US9589849B2Mar 7, 2017
Methods of modulating strain in PFET and NFET FinFET semiconductor devices
GLOBALFOUNDRIES INC3 citations73
US9570588B2Feb 14, 2017
Methods of forming transistor structures including forming channel material after formation processes to prevent damage to the channel material
GLOBALFOUNDRIES INC4 citations73
US9530869B2Dec 27, 2016
Methods of forming embedded source/drain regions on finFET devices
GLOBALFOUNDRIES INC3 citations73
US9515088B1Dec 6, 2016
High density and modular CMOS logic based on 3D stacked, independent-gate, junctionless FinFETs
GLOBALFOUNDRIES INC3 citations73
US9362361B1Jun 7, 2016
Methods of forming elastically relaxed SiGe virtual substrates on bulk silicon
GLOBALFOUNDRIES INC5 citations73
US9324618B1Apr 26, 2016
Methods of forming replacement fins for a FinFET device
GLOBALFOUNDRIES INC3 citations73
US9245980B2Jan 26, 2016
Methods of forming substantially defect-free, fully-strained silicon-germanium fins for a FinFET semiconductor device
GLOBALFOUNDRIES INC6 citations73
US9847333B2Dec 19, 2017
Reducing risk of punch-through in FinFET semiconductor structure
GLOBALFOUNDRIES INC4 citations71
US9882052B2Jan 30, 2018
Forming defect-free relaxed SiGe fins
GLOBALFOUNDRIES INC2 citations68
US9508848B1Nov 29, 2016
Methods of forming strained channel regions on FinFET devices by performing a heating process on a heat-expandable material
GLOBALFOUNDRIES INC2 citations63
US9502507B1Nov 22, 2016
Methods of forming strained channel regions on FinFET devices
GLOBALFOUNDRIES INC2 citations63
US9425315B2Aug 23, 2016
FinFET semiconductor device with isolated fins made of alternative channel materials
GLOBALFOUNDRIES INC2 citations63
US9406803B2Aug 2, 2016
FinFET device including a uniform silicon alloy fin
GLOBALFOUNDRIES INC2 citations63
US9312387B2Apr 12, 2016
Methods of forming FinFET devices with alternative channel materials
GLOBALFOUNDRIES INC2 citations63
US9305846B2Apr 5, 2016
Device isolation in FinFET CMOS
GLOBALFOUNDRIES INC2 citations63
US10411010B2Sep 10, 2019
Tall single-fin FIN-type field effect transistor structures and methods
GLOBALFOUNDRIES INC1 citations62
US10163677B2Dec 25, 2018
Electrically insulated fin structure(s) with alternative channel materials and fabrication methods
GLOBALFOUNDRIES INC0 citations52
US9881830B2Jan 30, 2018
Electrically insulated fin structure(s) with alternative channel materials and fabrication methods
GLOBALFOUNDRIES INC1 citations52
US9337022B1May 10, 2016
Virtual relaxed substrate on edge-relaxed composite semiconductor pillars
GLOBALFOUNDRIES INC0 citations52
US9184162B2Nov 10, 2015
FinFET integrated circuits and methods for their fabrication
GLOBALFOUNDRIES INC1 citations52
US8987094B2Mar 24, 2015
FinFET integrated circuits and methods for their fabrication
GLOBALFOUNDRIES INC0 citations52
US9190411B2Nov 17, 2015
Retrograde doped layer for device isolation
GLOBALFOUNDRIES INC1 citations51
US9076842B2Jul 7, 2015
Fin pitch scaling and active layer isolation
GLOBALFOUNDRIES INC0 citations51
US9679972B1Jun 13, 2017
Thin strain relaxed buffers with multilayer film stacks
GLOBALFOUNDRIES INC0 citations45
US10026659B2Jul 17, 2018
Methods of forming fin isolation regions under tensile-strained fins on FinFET semiconductor devices
GLOBALFOUNDRIES INC0 citations42
US9960257B2May 1, 2018
Common fabrication of multiple FinFETs with different channel heights
GLOBALFOUNDRIES INC0 citations42
US9590040B2Mar 7, 2017
Methods of forming fins for a FinFET device by forming and replacing sacrificial fin structures with alternative materials
GLOBALFOUNDRIES INC0 citations42
US9536990B2Jan 3, 2017
Methods of forming replacement fins for a FinFET device using a targeted thickness for the patterned fin etch mask
GLOBALFOUNDRIES INC0 citations42
US9455140B2Sep 27, 2016
Methods of forming doped epitaxial SiGe material on semiconductor devices
GLOBALFOUNDRIES INC0 citations42
US9425289B2Aug 23, 2016
Methods of forming alternative channel materials on FinFET semiconductor devices
GLOBALFOUNDRIES INC0 citations42
TAIWAN SEMICONDUCTOR MFG CO LTD
5 patentsUS12431423B2Sep 30, 2025
Method for low-cost, high-bandwidth monolithic system integration beyond reticle limit
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations63
US11735515B2Aug 22, 2023
Method for low-cost, high-bandwidth monolithic system integration beyond reticle limit
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations63
US12293229B2May 6, 2025
Artificial intelligence accelerator device
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations58
US12205665B2Jan 21, 2025
Three dimensional memory device and method for manufacturing the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations56
US12580011B2Mar 17, 2026
Memory circuit and method of operating same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations53
IBM
2 patentsShowing the top 50 of 51 patents by PatentIndex Score.