Inventor
IWASAWA KYOKO
JP9 patents
Patents
9 patentsUS6253371B1Jun 26, 2001
Method for supporting parallelization of source program
HITACHI LTD92 citations97
US5151991ASep 29, 1992
Parallelization compile method and system
HITACHI LTD123 citations97
US5088034AFeb 11, 1992
Compiling method for determining programs to be executed parallelly by respective processors in a parallel computer which transfer data with a data identifier to other processors
HITACHI LTD106 citations96
US4833606AMay 23, 1989
Compiling method for vectorizing multiple do-loops in source program
HITACHI LTD78 citations96
US5437034AJul 25, 1995
Method of generating from source program object program by which final values of variables for parallel execution are guaranteed
HITACHI LTD22 citations92
US5361352ANov 1, 1994
Method for debugging in a parallel computer system and system for the same
HITACHI LTD31 citations92
US5067068ANov 19, 1991
Method for converting an iterative loop of a source program into parellelly executable object program portions
HITACHI LTD23 citations92
US4821181AApr 11, 1989
Method for converting a source program of high level language statement into an object program for a vector processor
HITACHI LTD41 citations92
US4807126AFeb 21, 1989
Method for converting a source program having a loop including a control statement into an object program
HITACHI LTD20 citations81