Inventor
HO CHIA-MING
TW16 patents
⚠️ This page may combine multiple inventors who share the name “HO CHIA-MING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG
6 patentsUS8826213B1Sep 2, 2014
Parasitic capacitance extraction for FinFETs
TAIWAN SEMICONDUCTOR MFG440 citations98
US7818698B2Oct 19, 2010
Accurate parasitic capacitance extraction for ultra large scale integrated circuits
TAIWAN SEMICONDUCTOR MFG15 citations92
US8887116B2Nov 11, 2014
Flexible pattern-oriented 3D profile for advanced process nodes
TAIWAN SEMICONDUCTOR MFG46 citations91
US8904314B1Dec 2, 2014
RC extraction for multiple patterning layout design
TAIWAN SEMICONDUCTOR MFG8 citations82
US9230052B2Jan 5, 2016
Method of generating a simulation model of a predefined fabrication process
TAIWAN SEMICONDUCTOR MFG0 citations52
US9218448B2Dec 22, 2015
Resistive capacitance determination method for multiple-patterning-multiple spacer integrated circuit layout
TAIWAN SEMICONDUCTOR MFG0 citations43
TAIWAN SEMICONDUCTOR MFG CO LTD
5 patentsUS9710588B2Jul 18, 2017
Method of generating modified layout for RC extraction
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations73
US8954900B1Feb 10, 2015
Multi-patterning mask decomposition method and system
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations62
US10019548B2Jul 10, 2018
Method of generating modified layout and system therefor
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10140407B2Nov 27, 2018
Method, device and computer program product for integrated circuit layout generation
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations48
US9922162B2Mar 20, 2018
Resistive capacitance determination method for multiple-patterning-multiple spacer integrated circuit layout
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations41