Inventor
SAKOH TAKASHI
JP22 patents
⚠️ This page may combine multiple inventors who share the name “SAKOH TAKASHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NEC ELECTRONICS CORP
9 patentsUS7323760B2Jan 29, 2008
Fuse structure for semiconductor integrated circuit with improved insulation film thickness uniformity and moisture resistance
NEC ELECTRONICS CORP19 citations92
US7199420B2Apr 3, 2007
Semiconductor device
NEC ELECTRONICS CORP14 citations84
US6858916B2Feb 22, 2005
Semiconductor memory device with series-connected antifuse-components
NEC ELECTRONICS CORP14 citations84
US7432597B2Oct 7, 2008
Semiconductor device and method of manufacturing the same
NEC ELECTRONICS CORP7 citations74
US7579266B2Aug 25, 2009
Fuse structure for semiconductor integrated circuit with improved insulation film thickness uniformity and moisture resistance
NEC ELECTRONICS CORP5 citations73
US7638369B2Dec 29, 2009
Semiconductor chip and method of fabricating the same
NEC ELECTRONICS CORP4 citations63
US7826272B2Nov 2, 2010
Semiconductor memory device
NEC ELECTRONICS CORP2 citations62
US7829925B2Nov 9, 2010
Semiconductor device and method for manufacturing same
NEC ELECTRONICS CORP3 citations60
US7737481B2Jun 15, 2010
Semiconductor memory device
NEC ELECTRONICS CORP0 citations49
NEC CORP
7 patentsUS5641991AJun 24, 1997
Semiconductor device containing conductor plug that can reduce contact resistance
NEC CORP177 citations98
US6172389B1Jan 9, 2001
Semiconductor memory device having a reduced area for a resistor element
NEC CORP39 citations92
US5858837AJan 12, 1999
Method of manufacturing semiconductor memory device
NEC CORP35 citations92
US6384444B2May 7, 2002
Semiconductor device including capacitive element of an analog circuit
NEC CORP12 citations73
US5968692AOct 19, 1999
Integrated circuit pattern lithography method capable of reducing the number of shots in partial batch exposure
NEC CORP2 citations63
US6020092AFeb 1, 2000
Partial one-shot electron beam exposure mask and method of forming a partial one-shot electron beam exposure pattern
NEC CORP6 citations62
US5824591AOct 20, 1998
Method for manufacturing a stacked capacitor
NEC CORP6 citations62
RENESAS ELECTRONICS CORP
4 patentsUS10263066B2Apr 16, 2019
Memory and logic device and method for manufacturing the same
RENESAS ELECTRONICS CORP9 citations84
US7986012B2Jul 26, 2011
Semiconductor device and process for manufacturing same
RENESAS ELECTRONICS CORP8 citations84
US7974137B2Jul 5, 2011
Semiconductor memory device
RENESAS ELECTRONICS CORP1 citations52
US7898888B2Mar 1, 2011
Semiconductor memory device having memory cell and reference cell connected to same sense amplifier and method of reading data thereof
RENESAS ELECTRONICS CORP0 citations52
SAKOH TAKASHI
2 patentsUS8143119B2Mar 27, 2012
Method of manufacturing semiconductor device having plural transistors formed in well region and semiconductor device
SAKOH TAKASHI10 citations81
US8299543B2Oct 30, 2012
Method of manufacturing semiconductor device having plural transistors formed in well region and semiconductor device
SAKOH TAKASHI0 citations49