Inventor

KNALL N JOHAN

US41 patents

⚠️ This page may combine multiple inventors who share the name “KNALL N JOHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KNALL N JOHAN

MATRIX SEMICONDUCTOR INC

Electrically isolated pillars in active devices

Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication

Apparatus and method for disturb-free programming of passive element memory cells

Three-dimensional memory array and method of fabrication

Three-dimensional memory array incorporating serial chain diode stack

Patterning three dimensional structures

Formation of antifuse structure in a three dimensional memory

Low cost three-dimensional memory array

Three-dimensional memory array and method of fabrication

Manufacturing method for integrated circuit having disturb-free programming of passive element memory cells

Integrated circuit and method for selecting a set of memory-cell-layer-dependent or temperature-dependent operating conditions

Memory cell with antifuse layer formed at diode junction

Anti-fuse memory cell with asymmetric breakdown voltage

Method of forming nonvolatile memory device utilizing a hard mask

Digital memory method and system for storing multiple bit digital data

Apparatus and method for disturb-free programming of passive element memory cells

Method for making a three-dimensional memory array incorporating serial chain diode stack

Same conductivity type highly-doped regions for antifuse memory cell

Thermal processing for three dimensional circuits

Formation of antifuse structure in a three dimensional memory

Thermal processing for three dimensional circuits

CANDESCENT TECH CORP

Cleaning of electron-emissive elements

Fabrication of gated electron-emitting device utilizing distributed particles to define gate openings, typically in combination with spacer material to control spacing between gate layer and electron-emissive elements

Selective removal of material using self-initiated galvanic activity in electrolytic bath

Structure and fabrication of electron-emitting device having focus coating contacted through underlying access conductor

Fabrication of gated electron-emitting devices utilizing distributed particles to define gate openings, typically in combination with lift-off of excess emitter material

Undercutting technique for creating coating in spaced-apart segments

Electron-emitting device having multi-layer resistor

Field emitter fabrication using open circuit electrochemical lift off

Electron-emitting device having focus coating that extends partway into focus openings

Fabrication of gated electron-emitting device utilizing distributed particles to define gate openings and utilizing spacer material to control spacing between gate layer and electron-emissive elements

Impedance-assisted electrochemical removal of material, particularly excess emitter material in electron-emitting device

Protection of electron-emissive elements prior to removing excess emitter material during fabrication of electron-emitting device

Multi-step removal of excess emitter material in fabricating electron-emitting device

SANDISK 3D LLC

Reverse-bias method for writing memory cells in a memory array

Patterning three dimensional structures

Electrically isolated pillars in active devices

Process for fabricating a dielectric film using plasma oxidation

Three-dimensional memory array and method of fabrication

SANDISK CORP

Electrically isolated pillars in active devices

JOHNSON MARK G

Silicon nitride antifuse for use in diode-antifuse memory arrays