Inventor
YEAP GARY K
US15 patents
⚠️ This page may combine multiple inventors who share the name “YEAP GARY K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SYNOPSYS INC
7 patentsUS6961916B2Nov 1, 2005
Placement method for integrated circuit design using topo-clustering
SYNOPSYS INC45 citations94
US7937677B2May 3, 2011
Design-for-test-aware hierarchical design planning
SYNOPSYS INC9 citations76
US12118283B1Oct 15, 2024
Automatic channel identification of high-bandwidth memory channels for auto-routing
SYNOPSYS INC0 citations62
US11816407B1Nov 14, 2023
Automatic channel identification of high-bandwidth memory channels for auto-routing
SYNOPSYS INC0 citations62
US10922467B2Feb 16, 2021
Methodology using Fin-FET transistors
SYNOPSYS INC0 citations58
US12489021B1Dec 2, 2025
Determining a density of through-silicon vias in integrated circuits
SYNOPSYS INC0 citations57
US10817636B2Oct 27, 2020
Methodology using Fin-FET transistors
SYNOPSYS INC0 citations48
MONTEREY DESIGN SYSTEMS
2 patentsUS6442743B1Aug 27, 2002
Placement method for integrated circuit design using topo-clustering
MONTEREY DESIGN SYSTEMS126 citations96
US6192508B1Feb 20, 2001
Method for logic optimization for improving timing and congestion during placement in integrated circuit design
MONTEREY DESIGN SYSTEMS23 citations91