Inventor
NAGARAJAN PRADEEP
US13 patents
⚠️ This page may combine multiple inventors who share the name “NAGARAJAN PRADEEP”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ALTERA CORP
4 patentsUS9158873B1Oct 13, 2015
Circuit design technique for DQS enable/disable calibration
ALTERA CORP5 citations84
US7893739B1Feb 22, 2011
Techniques for providing multiple delay paths in a delay circuit
ALTERA CORP13 citations84
US8847626B1Sep 30, 2014
Circuits and methods for providing clock signals
ALTERA CORP6 citations69
US9059716B1Jun 16, 2015
Digital PVT compensation for delay chain
ALTERA CORP1 citations48
NAGARAJAN PRADEEP
4 patentsUS8237475B1Aug 7, 2012
Techniques for generating PVT compensated phase offset to improve accuracy of a locked loop
NAGARAJAN PRADEEP16 citations83
US8130016B2Mar 6, 2012
Techniques for providing reduced duty cycle distortion
NAGARAJAN PRADEEP8 citations83
US8680905B1Mar 25, 2014
Digital PVT compensation for delay chain
NAGARAJAN PRADEEP4 citations72
US8159277B1Apr 17, 2012
Techniques for providing multiple delay paths in a delay circuit
NAGARAJAN PRADEEP0 citations51