Inventor

FALLON ELIAS

US4 patents

⚠️ This page may combine multiple inventors who share the name “FALLON ELIAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CADENCE DESIGN SYSTEMS INC

3 patents

US7543262B2Jun 2, 2009

Analog layout module generator and method

CADENCE DESIGN SYSTEMS INC138 citations96

US7093220B2Aug 15, 2006

Method for generating constrained component placement for integrated circuits and packages

CADENCE DESIGN SYSTEMS INC19 citations82

US6874133B2Mar 29, 2005

Integrated circuit design layout compaction method

CADENCE DESIGN SYSTEMS INC14 citations82

KRISHNAN PRAKASH

1 patent

US8732640B1May 20, 2014

Methods, systems, and articles for multi-scenario physically-aware design methodology for layout-dependent effects

KRISHNAN PRAKASH39 citations91