Inventor

LIN SHI-TRON

TW73 patents

⚠️ This page may combine multiple inventors who share the name “LIN SHI-TRON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN SHI-TRON

WINBOND ELECTRONICS CORP

Distributed MOSFET structure with enclosed gate for improved transistor size/layout area ratio and uniform ESD triggering

Gate-coupled MOSFET ESD protection circuit

Bond pad with pad edge strengthening structure

Distributed MOSFET structure with enclosed gate for improved transistor size/layout area ratio and uniform ESD triggering

Dual-node capacitor coupled MOSFET for improving ESD performance

Early trigger of ESD protection device by a current spike generator

Bond-pad with a single anchoring structure

Input/output cell with robust electrostatic discharge protection

Apparatus and method for improved power bus ESD protection

High-speed MOSFET structure for ESD protection

Silicide block for ESD protection devices

Latch-up protection circuit for integrated circuits biased with multiple power supplies and its method

Negative-voltage-trigger SCR with a stack-gate ESD transient switch

Buried shallow trench isolation and method for forming the same

ESD Protection device integrated with SCR

Protection circuit against latch-up in a multiple-supply integrated circuit

Pin-assignment method for integrated circuit packages to increase the electro-static discharge protective capability thereof

Early trigger of ESD protection device by a negative voltage pump circuit

Buried shallow trench isolation and method for forming the same

Direct transient-triggered SCR for ESD protection

Low noise, high current-drive MOSFET structure for uniform serpentine-shaped poly-gate turn-on during an ESD event

Electrostatic discharge (ESD) protective device for integrated circuit packages with no-connect pins

MOS transistor structure for electro-static discharge protection circuitry having dispersed parallel paths

Electrostatic discharge protection metal-oxide semiconductor field-effect transistor with segmented diffusion regions

MOS transistor structure for electro-static discharge protection circuitry

Bond-pad with pad edge strengthening structure

Driving circuit

Bone-pad with pad edge strengthening structure

ESD protection devices and methods for reducing trigger voltage

Early triggered ESD MOSFET protection circuit and method thereof

ESD protection devices and methods for reducing trigger voltage

Memory writer with deflective memory-cell handling capability

Early trigger of ESD protection device by an oscillation circuit

Reinforced ESD protection for NC-pin adjacent input pin

Electrostatic discharge protection circuit

Self-corrective memory system and method

Method and system for loading microprograms in partially defective memory

Output buffer with good ESD protection

ESD protection devices and methods to reduce trigger voltage

System and method of processing memory

Output buffer with improved ESD protection

High-voltage tolerance input buffer and ESD protection circuit

Early trigger of ESD protection device by a voltage pump circuit

SRAM bitline pull-up MOSFET structure for internal circuit electro-static discharge immunity

Semiconductor device having reduced leakage and method of operating the same

I/O cell and ESD protection circuit

Electrostatic discharge protection devices and methods for the formation thereof

ESD protection device

Semiconductor integrated circuit for low-voltage high-speed operation

WINDBOND ELECTRONICS CORP

Integrated circuit package architecture with improved electrostatic discharge protection