Inventor

PAPPALARDO FRANCESCO

IT52 patents

⚠️ This page may combine multiple inventors who share the name “PAPPALARDO FRANCESCO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PAPPALARDO FRANCESCO

ST MICROELECTRONICS SRL

Architecture for controlling dissipated power in a system-on-chip and related system

Process and devices for transmitting digital signals over buses and computer program product therefore

Multidimensional processor architecture

Pipeline structure

Modular information processing system

Process and system for processing signals arranged in a bayer pattern

Process and devices for transmitting digital signals over buses and computer program product therefore

Process and device for reducing bus switching activity and computer program product therefor

Method and device for synchronization and identification of the codegroup in cellular communication systems and computer program product therefor

Process and device for synchronization and codegroup identification in cellular communication systems and computer program therefor

Method and system for high-speed floating-point operations and related computer program product

Processing method for providing, starting from signals acquired by a set of sensors, an aggregate signal and data acquisition system using such method

Method and device for transmitting data on a single line, in particular for transmitting data on a bus with minimization of the bus switching activity, and corresponding computer product

Method and device for floating-point multiplication, and corresponding computer-program product

Method for transmitting a data flow over an optical bus, corresponding system and computer program product

Method of transmitting data streams on optical links and system and computer program product therefor

Bus switch encoding for reducing crosstalk effects in buses

Method and system for coding/decoding signals and computer program product therefor

Process and device for the cell search procedure in cellular communication systems, computer program product therefor

Method and low consumption device for parallel generating channelization codes for CDMA transmissions, in particular WH and OVSF codes

System and method for clock resynchronization

Method of executing instructions using first and second control units that share a state register

Method and circuit system for the synchronous transmission of digital signals through a bus

Reconfigurable CPU with second FSM control unit executing modifiable instructions

Direct control of operation blocks using operand signal of control instruction as extension to instruction set in a hardwired control processor

Processing pipeline of pixel data of a color image acquired by a digital sensor

System related integrated circuit, apparatus and method

System related integrated circuit, apparatus and method

Process and devices for transmitting digital signals over buses and computer program product therefore

Monitoring device with jumper cable coupling and related methods

Method and apparatus for channel estimation and cell search in cellular communication systems, and corresponding computer program product

Data coding method and corresponding data processing unit having a coding/decoding circuit

Processor with a control instruction for sending control signals without interpretation for extension of instruction set

Coding and memorizing method for fuzzy logic membership functions and corresponding method and circuit architecture for calculating the membership degree

Capacitive pressure sensor for monitoring construction structures, particularly made of concrete

Method for processing fuzzy inferences and corresponding processing structure

Receiver circuit, related integrated circuit and apparatus

Method and device for floating-point multiplication, and corresponding computer-program product

Optimized method of computing the degree of membership of a fuzzy variable, and a calculator circuit implementing the method

CONS RIC MICROELETTRONICA

Fuzzy processor with architecture for non-fuzzy processing

Apparatus for dividing an integer by 2n with over or under approximation

Method for storing membership functions and related circuit for calculating a grade of membership of antecedents of fuzzy rules

Method for storing membership functions and related circuit for calculating a grade of membership of antecedents of fuzzy rules

VISALLI GIUSEPPE

Cache memory system and method with improved mapping flexibility

Processing method for providing, starting from signals acquired by a set of sensors, an aggregate signal and data acquisition system using such method

Processing method for providing, starting from signals acquired by a set of sensors, an aggregate signal and data acquisition system using such method

PAPPALARDO FRANCESCO

Method and arrangement for cache memory management, related processor architecture

System for detecting operating errors in integrated circuits

Processor architecture with processing clusters providing vector and scalar data processing capability

SGS THOMSON MICROELECTRONICS

Coding and storing method for fuzzy logic rules and circuit architecture for processing such rules