P

Inventor

PELSTER DAVID J

US28 patents
⚠️ This page may combine multiple inventors who share the name “PELSTER DAVID J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

15 patents
US10877696B2Dec 29, 2020

Independent NAND memory operations by plane

INTEL CORP17 citations82
US10061516B2Aug 28, 2018

Methods and apparatus to configure performance of a solid state drive based on host write bandwidth

INTEL CORP7 citations82
US9679658B2Jun 13, 2017

Method and apparatus for reducing read latency for a block erasable non-volatile memory

INTEL CORP15 citations80
US9830093B2Nov 28, 2017

Method and apparatus for improving immunity to defects in a non-volatile memory

INTEL CORP4 citations73
US9740437B2Aug 22, 2017

Mechanism to adapt garbage collection resource allocation in a solid state drive

INTEL CORP5 citations72
US10453540B2Oct 22, 2019

Method and apparatus to prioritize read response time in a power-limited storage device

INTEL CORP2 citations71
US9766814B2Sep 19, 2017

Method and apparatus for defect management in a non-volatile memory device

INTEL CORP5 citations71
US10956081B2Mar 23, 2021

Method, system, and apparatus for multi-tiered progressive memory program operation suspend and resume

INTEL CORP0 citations59
US10929251B2Feb 23, 2021

Data loss prevention for integrated memory buffer of a self encrypting drive

INTEL CORP0 citations56
US9483185B2Nov 1, 2016

Gradual context saving in a data storage device

INTEL CORP0 citations52
US10817180B2Oct 27, 2020

Methods and apparatus to configure performance of a solid state drive based on host write bandwidth

INTEL CORP0 citations51
US10770128B2Sep 8, 2020

Non volatile mass storage device with improved refresh algorithm

INTEL CORP0 citations51
US10795838B2Oct 6, 2020

Using transfer buffer to handle host read collisions in SSD

INTEL CORP0 citations50
US10585791B2Mar 10, 2020

Ordering of memory device mapping to reduce contention

INTEL CORP0 citations47
US10372446B2Aug 6, 2019

Technology to dynamically modulate memory device read granularity

INTEL CORP0 citations33

SK HYNIX NAND PRODUCT SOLUTIONS CORP

11 patents
US12366965B2Jul 22, 2025

Solid state drive with multiplexed internal channel access during program data transfers

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations61
US11797188B2Oct 24, 2023

Solid state drive with multiplexed internal channel access during program data transfers

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations61
US12367137B2Jul 22, 2025

Free space and input/output stability management for non-uniform workloads

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations56
US12487780B2Dec 2, 2025

Dynamic program suspend disable for random write SSD workload

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations54
US12366962B2Jul 22, 2025

System method for improving read command process times in solid-state drives (SSD) by having processor split-up background writes based on determined command size

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations54
US12131064B2Oct 29, 2024

Dynamic program suspend disable for random write SSD workload

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations54
US12360889B2Jul 15, 2025

Validity distribution for performance uniformity

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations53
US12504913B2Dec 23, 2025

Methods and systems to dynamically improve low task storage depth latency in a solid-state drive device

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations51
US12189504B2Jan 7, 2025

Systems, methods, and media for reducing the impact of drive parameter writes on solid state drive performance

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations51
US12223172B2Feb 11, 2025

Systems, methods, and media for controlling background wear leveling in solid-state drives

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations50
US12051472B2Jul 30, 2024

Solid state drive (SSD) with in-flight erasure iteration suspension

SK HYNIX NAND PRODUCT SOLUTIONS CORP0 citations49

WAKCHAURE YOGESH B

2 patents