Inventor

IIZUKA TETSUYA

JP112 patents

⚠️ This page may combine multiple inventors who share the name “IIZUKA TETSUYA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IIZUKA TETSUYA

SONY CORP

Solid-state image pickup device and device driving control method for solid-state image pickup

Method for driving an imaging device and image pickup device wherein signals corresponding to same color outputs are combined

Color CCD solid-state image pickup device

Method for driving an imaging device and image pickup device, wherein signals corresponding to same color outputs are combined

Solid-state image pickup device and signal processing method therefor

Method of driving solid-state imaging device, solid-state imaging device and camera

Method of driving solid state imaging device

Color CCD solid-state image pickup

Solid-state imager for use with two different TV systems

CCD shift register having a plurality of storage regions and transfer regions therein

Structure of solid-state image sensing devices

Solid-state image pickup device and signal processing method therefor

Image pickup unit having reduced signaling lines

Solid-state imaging device and electronic device

Signal processing circuit for solid-state image sensor

Solid state image sensor

Charge coupled device imager having multichannel readout structure

TOSHIBA KK

Array substrate with bus lines takeout/terminal sections having multiple conductive layers

Array substrate comprising semiconductor contact layers having same outline as signal lines

Active matrix liquid crystal display device including wiring line with light blocking property columnar spacers and frame pattern around display area

Array substrate for display device and manufacturing method thereof

Array substrate for displaying device with capacitor lines having particular connections

MOS semiconductor integrated circuit in which the production of hot carriers near the drain of a short n channel conductivity type MOS transistor is decreased

Power-saving voltage supply

Liquid crystal display device including shield pattern and color filter coexist together in the vicinity of the inlet

Active matrix liquid crystal display device

Liquid crystal display device having a TFT switch composed of a separate transparent layer for connecting the pixel and drain electrodes

MOS semiconductor integrated circuit in which the production of hot carriers near the drain of a short n channel conductivity type MOS transistor is decreased

Self-refresh control circuit for dynamic semiconductor memory device

Dynamic RAM

Static memory utilizing transition detectors to reduce power consumption

Liquid crystal display device comprises a plurality of TFTs with a desirable channel length which reduces the resistance of the scanning lines

Static memory with pull-up circuit for pulling-up a potential on a bit line

Semiconductor memory device having a floating gate

SUMITOMO WIRING SYSTEMS

Electrical junction box

Sound-absorbing material and a cable reel including the same

Electrical junction box

Cable reel including a sound-absorbing material and method for producing the sound-absorbing material for the cable reel

Cable reel including a sound-absorbing material and method for producing the sound-absorbing material for the cable reel

Sound-absorbing material and a cable reel including the same

TOKYO SHIBAURA ELECTRIC CO

Semiconductor memory device

CMOS Charge pump free of parasitic injection

Dynamic memory device with an RC circuit for inhibiting the effects of alpha particle radiation

Metal oxide semiconductor field-effect transistor with metal source region

JAPAN DISPLAY INC

Display device

Display device

MITSUBISHI ELECTRIC CORP

Air conditioner indoor unit

TOSHIBA MATSUSHITA DISPLAY TEC

Liquid crystal display device

NIPPON TELEGRAPH & TELEPHONE

Scheme for automatic data conversion definition generation according to data feature in visual multidimensional data analysis tool

KAWASAKI SHIBAURA DENKI KABUSH

Floating gate type EEPROM with a substrate region used for the control gate