Inventor
Waterman Andrew
US15 patents
Patents
15 patentsUS12086067B2Sep 10, 2024
Load-store pipeline selection for vectors
SIFIVE INC0 citations61
US11861365B2Jan 2, 2024
Macro-op fusion
SIFIVE INC1 citations61
US11797308B2Oct 24, 2023
Fetch stage handling of indirect jumps in a processor pipeline
SIFIVE INC0 citations61
US11687342B2Jun 27, 2023
Way predictor and enable logic for instruction tightly-coupled memory and instruction cache
SIFIVE INC0 citations61
US11301251B2Apr 12, 2022
Fetch stage handling of indirect jumps in a processor pipeline
SIFIVE INC0 citations61
US11048515B2Jun 29, 2021
Way predictor and enable logic for instruction tightly-coupled memory and instruction cache
SIFIVE INC0 citations61
US10996952B2May 4, 2021
Macro-op fusion
SIFIVE INC1 citations61
US12487829B2Dec 2, 2025
Macro-op fusion for pipelined architectures
SIFIVE INC0 citations60
US12468540B2Nov 11, 2025
Technologies for prediction-based register renaming
SIFIVE INC0 citations50
US12437121B2Oct 7, 2025
Efficient processing of masked memory accesses
SIFIVE INC0 citations50
US12417103B2Sep 16, 2025
Fusion with destructive instructions
SIFIVE INC0 citations50
US12314191B2May 27, 2025
Memory protection for vector operations
SIFIVE INC0 citations50
US12253959B2Mar 18, 2025
Memory protection for gather-scatter operations
SIFIVE INC0 citations50
US11429392B2Aug 30, 2022
Secure predictors for speculative execution
SIFIVE INC0 citations50
US12367154B2Jul 22, 2025
Logging guest physical address for memory access faults
SIFIVE INC0 citations49