Inventor
AKATSU TAKESHI
FR21 patents
Patents
21 patentsUS7449394B2Nov 11, 2008
Atomic implantation and thermal treatment of a semiconductor layer
SOITEC SILICON ON INSULATOR20 citations92
US7001826B2Feb 21, 2006
Wafer with a relaxed useful layer and method of forming the wafer
SOITEC SILICON ON INSULATOR19 citations92
US7008857B2Mar 7, 2006
Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom
SOITEC SILICON ON INSULATOR16 citations91
US7476930B2Jan 13, 2009
Multi-gate FET with multi-layer channel
SOITEC SILICON ON INSULATOR9 citations84
US7232488B2Jun 19, 2007
Method of fabrication of a substrate for an epitaxial growth
SOITEC SILICON ON INSULATOR10 citations84
US7323398B2Jan 29, 2008
Method of layer transfer comprising sequential implantations of atomic species
SOITEC SILICON ON INSULATOR16 citations83
US7256075B2Aug 14, 2007
Recycling of a wafer comprising a multi-layer structure after taking-off a thin layer
SOITEC SILICON ON INSULATOR20 citations83
US7326628B2Feb 5, 2008
Thin layer transfer method utilizing co-implantation to reduce blister formation and to surface roughness
SOITEC SILICON ON INSULATOR18 citations80
US7375008B2May 20, 2008
Recycling by mechanical means of a wafer comprising a multilayer structure after taking-off a thin layer thereof
SOITEC SILICON ON INSULATOR6 citations73
US7282449B2Oct 16, 2007
Thermal treatment of a semiconductor layer
SOITEC SILICON ON INSULATOR8 citations73
US7276428B2Oct 2, 2007
Methods for forming a semiconductor structure
SOITEC SILICON ON INSULATOR7 citations73
US6982210B2Jan 3, 2006
Method for manufacturing a multilayer semiconductor structure that includes an irregular layer
SOITEC SILICON ON INSULATOR6 citations63
US7602046B2Oct 13, 2009
Recycling by mechanical means of a wafer comprising a multilayer structure after taking-off a thin layer thereof
SOITEC SILICON ON INSULATOR4 citations62
US7285495B2Oct 23, 2007
Methods for thermally treating a semiconductor layer
SOITEC SILICON ON INSULATOR4 citations62
US7776716B2Aug 17, 2010
Method for fabricating a semiconductor on insulator wafer
SOITEC SILICON ON INSULATOR2 citations61
US7033905B2Apr 25, 2006
Recycling of a wafer comprising a buffer layer after having separated a thin layer therefrom by mechanical means
SOITEC SILICON ON INSULATOR5 citations61
US8012289B2Sep 6, 2011
Method of fabricating a release substrate
SOITEC SILICON ON INSULATOR0 citations52
US7265435B2Sep 4, 2007
Method for implanting atomic species through an uneven surface of a semiconductor layer
SOITEC SILICON ON INSULATOR0 citations52
US7018913B2Mar 28, 2006
Method for implanting atomic species through an uneven surface of a semiconductor layer
SOITEC SILICON ON INSULATOR0 citations52
US7378729B2May 27, 2008
Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom
SOITEC SILICON ON INSULATOR0 citations51
US7544265B2Jun 9, 2009
Method of fabricating a release substrate
SOITEC SILICON ON INSULATOR0 citations48