Inventor
MICHAEL BRAD W
US31 patents
⚠️ This page may combine multiple inventors who share the name “MICHAEL BRAD W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
21 patentsUS5430847AJul 4, 1995
Method and system for extending system buses to external devices
IBM44 citations86
US10169013B2Jan 1, 2019
Arranging binary code based on call graph partitioning
IBM5 citations84
US9430418B2Aug 30, 2016
Synchronization and order detection in a memory system
IBM11 citations84
US7486096B2Feb 3, 2009
Method and apparatus for testing to determine minimum operating voltages in electronic devices
IBM9 citations84
US10353669B2Jul 16, 2019
Managing entries in a mark table of computer memory errors
IBM2 citations73
US10338999B2Jul 2, 2019
Confirming memory marks indicating an error in computer memory
IBM2 citations73
US10304560B2May 28, 2019
Performing error correction in computer memory
IBM2 citations73
US10297335B2May 21, 2019
Tracking address ranges for computer memory errors
IBM4 citations73
US9594647B2Mar 14, 2017
Synchronization and order detection in a memory system
IBM4 citations73
US7610531B2Oct 27, 2009
Modifying a test pattern to control power supply noise
IBM7 citations73
US9916144B2Mar 13, 2018
Arranging binary code based on call graph partitioning
IBM1 citations63
US11017875B2May 25, 2021
Tracking address ranges for computer memory errors
IBM0 citations62
US10971246B2Apr 6, 2021
Performing error correction in computer memory
IBM0 citations62
US10901839B2Jan 26, 2021
Common high and low random bit error correction logic
IBM1 citations62
US10324694B2Jun 18, 2019
Arranging binary code based on call graph partitioning
IBM0 citations52
US10140186B2Nov 27, 2018
Memory error recovery
IBM0 citations52
US9940204B2Apr 10, 2018
Memory error recovery
IBM1 citations52
US9495254B2Nov 15, 2016
Synchronization and order detection in a memory system
IBM0 citations52
US7870308B2Jan 11, 2011
Programmable direct memory access engine
IBM1 citations51
US7870309B2Jan 11, 2011
Multithreaded programmable direct memory access engine
IBM1 citations50
US10824504B2Nov 3, 2020
Common high and low random bit error correction logic
IBM0 citations39
CHEN TONG
7 patentsUS8522225B2Aug 27, 2013
Rewriting branch instructions using branch stubs
CHEN TONG18 citations92
US8782381B2Jul 15, 2014
Dynamically rewriting branch instructions in response to cache line eviction
CHEN TONG7 citations84
US8713548B2Apr 29, 2014
Rewriting branch instructions using branch stubs
CHEN TONG6 citations84
US8631225B2Jan 14, 2014
Dynamically rewriting branch instructions to directly target an instruction cache location
CHEN TONG7 citations84
US9459851B2Oct 4, 2016
Arranging binary code based on call graph partitioning
CHEN TONG3 citations73
US8627051B2Jan 7, 2014
Dynamically rewriting branch instructions to directly target an instruction cache location
CHEN TONG5 citations73
US9600253B2Mar 21, 2017
Arranging binary code based on call graph partitioning
CHEN TONG1 citations62