Inventor
LEUSINK GERRIT J
US40 patents
⚠️ This page may combine multiple inventors who share the name “LEUSINK GERRIT J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TOKYO ELECTRON LTD
36 patentsUS6274496B1Aug 14, 2001
Method for single chamber processing of PECVD-Ti and CVD-TiN films for integrated contact/barrier applications in IC manufacturing
TOKYO ELECTRON LTD391 citations99
US10833078B2Nov 10, 2020
Semiconductor apparatus having stacked gates and method of manufacture thereof
TOKYO ELECTRON LTD34 citations94
US7772073B2Aug 10, 2010
Semiconductor device containing a buried threshold voltage adjustment layer and method of forming
TOKYO ELECTRON LTD35 citations93
US7459396B2Dec 2, 2008
Method for thin film deposition using multi-tray film precursor evaporation system
TOKYO ELECTRON LTD25 citations92
US6302057B1Oct 16, 2001
Apparatus and method for electrically isolating an electrode in a PECVD process chamber
TOKYO ELECTRON LTD34 citations89
US10068764B2Sep 4, 2018
Selective metal oxide deposition using a self-assembled monolayer surface pretreatment
TOKYO ELECTRON LTD7 citations84
US10378105B2Aug 13, 2019
Selective deposition with surface treatment
TOKYO ELECTRON LTD12 citations83
US7708835B2May 4, 2010
Film precursor tray for use in a film precursor evaporation system and method of using
TOKYO ELECTRON LTD12 citations83
US7638002B2Dec 29, 2009
Multi-tray film precursor evaporation system and thin film deposition system incorporating same
TOKYO ELECTRON LTD14 citations83
US7484315B2Feb 3, 2009
Replaceable precursor tray for use in a multi-tray solid precursor delivery system
TOKYO ELECTRON LTD18 citations83
US7488512B2Feb 10, 2009
Method for preparing solid precursor tray for use in solid precursor evaporation system
TOKYO ELECTRON LTD15 citations81
US6626186B1Sep 30, 2003
Method for stabilizing the internal surface of a PECVD process chamber
TOKYO ELECTRON LTD19 citations77
US11443953B2Sep 13, 2022
Method for forming and using stress-tuned silicon oxide films in semiconductor device patterning
TOKYO ELECTRON LTD2 citations73
US10453681B2Oct 22, 2019
Method of selective vertical growth of a dielectric material on a dielectric substrate
TOKYO ELECTRON LTD5 citations73
US10217670B2Feb 26, 2019
Wrap-around contact integration scheme
TOKYO ELECTRON LTD2 citations73
US10014213B2Jul 3, 2018
Selective bottom-up metal feature filling for interconnects
TOKYO ELECTRON LTD4 citations73
US9646898B2May 9, 2017
Methods for treating a substrate by optical projection of a correction pattern based on a detected spatial heat signature of the substrate
TOKYO ELECTRON LTD4 citations73
US10157784B2Dec 18, 2018
Integration of a self-forming barrier layer and a ruthenium metal liner in copper metallization
TOKYO ELECTRON LTD4 citations71
US7985680B2Jul 26, 2011
Method of forming aluminum-doped metal carbonitride gate electrodes
TOKYO ELECTRON LTD3 citations63
US7345184B2Mar 18, 2008
Method and system for refurbishing a metal carbonyl precursor
TOKYO ELECTRON LTD5 citations63
US12341053B2Jun 24, 2025
System for backside deposition of a substrate
TOKYO ELECTRON LTD0 citations62
US11908728B2Feb 20, 2024
System for backside deposition of a substrate
TOKYO ELECTRON LTD0 citations62
US11444082B2Sep 13, 2022
Semiconductor apparatus having stacked gates and method of manufacture thereof
TOKYO ELECTRON LTD1 citations62
US10923392B2Feb 16, 2021
Interconnect structure and method of forming the same
TOKYO ELECTRON LTD1 citations62
US10580691B2Mar 3, 2020
Method of integrated circuit fabrication with dual metal power rail
TOKYO ELECTRON LTD1 citations62
US7678421B2Mar 16, 2010
Method for increasing deposition rates of metal layers from metal-carbonyl precursors
TOKYO ELECTRON LTD2 citations62
US11894240B2Feb 6, 2024
Semiconductor processing systems with in-situ electrical bias
TOKYO ELECTRON LTD0 citations59
US10541174B2Jan 21, 2020
Interconnect structure and method of forming the same
TOKYO ELECTRON LTD0 citations52
US10410861B2Sep 10, 2019
Method of filling retrograde recessed features
TOKYO ELECTRON LTD0 citations52
US9735067B2Aug 15, 2017
Substrate tuning system and method using optical projection
TOKYO ELECTRON LTD1 citations52
US10700009B2Jun 30, 2020
Ruthenium metal feature fill for interconnects
TOKYO ELECTRON LTD0 citations51
US10056328B2Aug 21, 2018
Ruthenium metal feature fill for interconnects
TOKYO ELECTRON LTD1 citations51
US9711449B2Jul 18, 2017
Ruthenium metal feature fill for interconnects
TOKYO ELECTRON LTD1 citations51
US12237216B2Feb 25, 2025
Method for filling recessed features in semiconductor devices with a low-resistivity metal
TOKYO ELECTRON LTD0 citations50
US10008564B2Jun 26, 2018
Method of corner rounding and trimming of nanowires by microwave plasma
TOKYO ELECTRON LTD0 citations50
US10426001B2Sep 24, 2019
Processing system for electromagnetic wave treatment of a substrate at microwave frequencies
TOKYO ELECTRON LTD0 citations41