Inventor

Gangwar Anup

IN17 patents

⚠️ This page may combine multiple inventors who share the name “Gangwar Anup”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

Gangwar Anup

ADVANCED RISC MACH LTD

Integrated circuit design

Network on-chip topology generation

Virtual channel assignment for topology constrained network-on-chip design

Integrated circuit design

Network-on-chip link size generation

Network-on-chip topology generation

Network-on-Chip topology generation

Network-on-chip topology generation

Network-on-chip element placement

Network-on-chip topology generation

Integrated circuit design

Netspeed Systems

Hardware and software enabled implementation of power profile management instructions in system on chip

Specification for automatic power management of network-on-chip and system-on-chip

Automatic generation of power management sequence in a SoC or NoC

Automatic generation of power management sequence in a SoC or NoC

Verification low power collateral generation

NETSPEED SYSTEMS INC

Hardware and software enabled implementation of power profile management instructions in system on chip