Inventor
TSAI KUEI CHANG
US16 patents
⚠️ This page may combine multiple inventors who share the name “TSAI KUEI CHANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MOSEL VITELIC INC
6 patentsUS6566196B1May 20, 2003
Sidewall protection in fabrication of integrated circuits
MOSEL VITELIC INC51 citations92
US6017816AJan 25, 2000
Method of fabricating A1N anti-reflection coating on metal layer
MOSEL VITELIC INC10 citations73
US6336787B1Jan 8, 2002
Method for transferring wafers in a semiconductor tape-peeling apparatus
MOSEL VITELIC INC13 citations71
US6384482B1May 7, 2002
Method for forming a dielectric layer in a semiconductor device by using etch stop layers
MOSEL VITELIC INC13 citations70
US6117780ASep 12, 2000
Chemical mechanical polishing method with in-line thickness detection
MOSEL VITELIC INC14 citations68
US6984574B2Jan 10, 2006
Cobalt silicide fabrication using protective titanium
MOSEL VITELIC INC3 citations61
PROMOS TECHNOLOGIES INC
4 patentsUS7297628B2Nov 20, 2007
Dynamically controllable reduction of vertical contact diameter through adjustment of etch mask stack for dielectric etch
PROMOS TECHNOLOGIES INC14 citations78
US7375027B2May 20, 2008
Method of providing contact via to a surface
PROMOS TECHNOLOGIES INC2 citations60
US7071115B2Jul 4, 2006
Use of multiple etching steps to reduce lateral etch undercut
PROMOS TECHNOLOGIES INC0 citations50
US7300745B2Nov 27, 2007
Use of pedestals to fabricate contact openings
PROMOS TECHNOLOGIES INC0 citations40
ADESTO TECHNOLOGIES CORP
3 patentsUS8941089B2Jan 27, 2015
Resistive switching devices and methods of formation thereof
ADESTO TECHNOLOGIES CORP18 citations80
US11056646B2Jul 6, 2021
Memory device having programmable impedance elements with a common conductor formed below bit lines
ADESTO TECHNOLOGIES CORP1 citations62
US10497868B2Dec 3, 2019
Memory elements having conductive cap layers and methods therefor
ADESTO TECHNOLOGIES CORP1 citations59