Inventor
NARWADE MAHANTESH D
US3 patents
Patents
3 patentsUS9990453B2Jun 5, 2018
Clock-domain-crossing specific design mutations to model silicon behavior and measure verification robustness
SYNOPSYS INC2 citations59
US12393754B2Aug 19, 2025
Generating a reduced block model view on-the-fly
SYNOPSYS INC0 citations51
US9792394B2Oct 17, 2017
Accurate glitch detection
SYNOPSYS INC1 citations46