Inventor

LIN CHRONG-JUNG

TW105 patents

⚠️ This page may combine multiple inventors who share the name “LIN CHRONG-JUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN CHRONG-JUNG

TAIWAN SEMICONDUCTOR MFG

STI process for improving isolation for deep sub-micron application

Vertical split gate flash memory device in an orthogonal array of rows and columns with devices in columns having shared source regions

High aspect ratio shallow trench using silicon implanted oxide

Thin ONO thickness control and gradual gate oxidation suppression by b. N.su2 treatment in flash memory

Method of manufacture of vertical stacked gate flash memory device

Method of making embedded flash memory with salicide and sac structure

Method of manufacture of self-aligned floating gate, flash memory cell and device manufactured thereby

Vertical stacked gate flash memory device

Method to increase the coupling ratio of word line to floating gate by lateral coupling in stacked-gate flash

Method for making deep sub-micron mosfet structures having improved electrical characteristics

Stack gate flash memory cell featuring symmetric self aligned contact structures

Stacked-gate flash memory cell with folding gate and increased coupling ratio

Wafer-level antenna effect detection pattern for VLSI

Flash memory cell with vertically oriented channel

Method of manufacture of vertical split gate flash memory device

Wafer-level antenna effect detection pattern for VLSI

Integration process to increase high voltage breakdown performance

Tilt-angle ion implant to improve junction breakdown in flash memory application

Plasma damage protection cell using floating N/P/N and P/N/P structure

Implant method to improve characteristics of high voltage isolation and high voltage breakdown

Step-shaped floating poly-si gate to improve gate coupling ratio for flash memory application

Method of manufacture of self-aligned floating gate, flash memory cell and device manufactured thereby

Method for forming mirror image split gate flash memory devices by forming a central source line slot

Using ONO as hard mask to reduce STI oxide loss on low voltage device in flash or EPROM process

Method for forming vertical channel flash memory cell using P/N junction isolation

Vertical channels in split-gate flash memory cell

Flash memory cell with vertical channels, and source/drain bus lines

Process for forming self-aligned source in flash cell using SiN spacer as hard mask

Method for forming vertical channels in split-gate flash memory cell

Method for forming vertical channel flash memory cell and device manufactured thereby

Method of making the selection gate in a split-gate flash eeprom cell and its structure

Method to free control tunneling oxide thickness on poly tip of flash

Vertical split gate field effect transistor (FET) device

Step-shaped floating poly-si gate to improve a gate coupling ratio for flash memory application

Method for fabricating a on-chip temperature controller by co-implant polysilicon resistor

Plasma damage protection cell using floating N/P/N and P/N/P structure

Multi-level (4state/2-bit) stacked gate flash memory cell

Split gate flash memory device with source line

Flash memory with split gate structure and method of fabricating the same

Flash memory cell with vertical channels, and source/drain bus lines

Charge collector structure for detecting radiation induced charge during integrated circuit processing

Split gate field effect transistor (FET) device employing non-linear polysilicon floating gate electrode dopant profile

TAIWAN SEMICONDUCTOR MFG CO LTD

Memory cell including programmable resistors with transistor components

Memory cell including programmable resistors with transistor components

(unassigned)

Process for simultaneously fabricating a stack gate flash memory cell and salicided periphereral devices

TAIWAN SEMICONDUCTOR MANUFACTO

Multi-level (4 state/2-bit) stacked gate flash memory cell

EMEMORY TECHNOLOGY INC

Semiconductor capacitor

LIN CHRONG-JUNG

Variable and reversible resistive element, non-volatile memory device and methods for operating and manufacturing the non-volatile memory device

AU OPTRONICS CORP

Photo sensor and flat display panel

TAIWAN SEMICONDUCTOR MAUFACTUR

Method of making the selection gate in a split-gate flash EEPROM cell and its structure