Inventor
LIM SENG-SOOI
US23 patents
Patents
23 patentsUS6081997AJul 4, 2000
System and method for packaging an integrated circuit using encapsulant injection
LSI LOGIC CORP202 citations99
US5973393AOct 26, 1999
Apparatus and method for stackable molded lead frame ball grid array packaging of integrated circuits
LSI LOGIC CORP169 citations99
US6225695B1May 1, 2001
Grooved semiconductor die for flip-chip heat sink attachment
LSI LOGIC CORP123 citations98
US6002169ADec 14, 1999
Thermally enhanced tape ball grid array package
LSI LOGIC CORP114 citations96
US5744084AApr 28, 1998
Method of improving molding of an overmolded package body on a substrate
LSI LOGIC CORP54 citations96
US5434750AJul 18, 1995
Partially-molded, PCB chip carrier package for certain non-square die shapes
LSI LOGIC CORP68 citations96
US5262927ANov 16, 1993
Partially-molded, PCB chip carrier package
LSI LOGIC CORP85 citations96
US5197183AMar 30, 1993
Modified lead frame for reducing wire wash in transfer molding of IC packages
LSI LOGIC CORP107 citations96
US5643835AJul 1, 1997
Process for manufacturing and mounting a semiconductor device leadframe having alignment tabs
LSI LOGIC CORP41 citations93
US5594626AJan 14, 1997
Partially-molded, PCB chip carrier package for certain non-square die shapes
LSI LOGIC CORP43 citations93
US5521427AMay 28, 1996
Printed wiring board mounted semiconductor device having leadframe with alignment feature
LSI LOGIC CORP36 citations93
US6519844B1Feb 18, 2003
Overmold integrated circuit package
LSI LOGIC CORP36 citations92
US6114189ASep 5, 2000
Molded array integrated circuit package
LSI LOGIC CORP51 citations92
US6054767AApr 25, 2000
Programmable substrate for array-type packages
LSI LOGIC CORP26 citations92
US5927505AJul 27, 1999
Overmolded package body on a substrate
LSI LOGIC CORP26 citations92
US5353193AOct 4, 1994
High power dissipating packages with matched heatspreader heatsink assemblies
LSI LOGIC CORP35 citations92
US5463529AOct 31, 1995
High power dissipating packages with matched heatspreader heatsink assemblies
LSI LOGIC CORP24 citations91
US6512293B1Jan 28, 2003
Mechanically interlocking ball grid array packages and method of making
LSI LOGIC CORP15 citations83
US6040632AMar 21, 2000
Multiple sized die
LSI LOGIC CORP11 citations74
US5981311ANov 9, 1999
Process for using a removeable plating bus layer for high density substrates
LSI LOGIC CORP8 citations74
US5568683AOct 29, 1996
Method of cooling a packaged electronic device
LSI LOGIC CORP8 citations72
US6492253B1Dec 10, 2002
Method for programming a substrate for array-type packages
LSI LOGIC CORP2 citations63
US5973397AOct 26, 1999
Semiconductor device and fabrication method which advantageously combine wire bonding and tab techniques to increase integrated circuit I/O pad density
LSI LOGIC CORP3 citations63