Inventor · disambiguated record
Keith B. Dulac
Also filed as: DULAC KEITH B
16 granted patents·1,188 citations·filing 1987–1998
96Inventor score
Top patents by PatentIndex Score
16 records- 0191US5163132AIntegrated controller using alternately filled and emptied buffers for controlling bi-directional data transfer between a processor and a data storage deviceNCR CO·Filed 1989·Granted Nov 10, 1992·119 cites·7 claims
- 0290US5899582AMovie-on-demand disk storage loop architectureHYUNDAI ELECTRONICS AMERICA·Filed 1997·Granted May 4, 1999·141 cites·14 claims
- 0388US5257391ADisk controller having host interface and bus switches for selecting buffer and drive busses respectively based on configuration control signalsNCR CO·Filed 1991·Granted Oct 26, 1993·133 cites·14 claims
- 0486US4965801AArchitectural arrangement for a SCSI disk controller integrated circuitNCR CO·Filed 1987·Granted Oct 23, 1990·88 cites·11 claims
- 0583US6442599B1Video storage unit architectureLSI LOGIC CORP·Filed 1998·Granted Aug 27, 2002·73 cites·8 claims
- 0683US5625405AArchitectural arrangement for a video serverAT & T GLOBAL INF SOLUTION·Filed 1996·Granted Apr 29, 1997·165 cites·14 claims
- 0782US4843544AMethod and apparatus for controlling data transfers through multiple buffersNCR CO·Filed 1987·Granted Jun 27, 1989·74 cites·8 claims
- 0881US5550986AData storage device matrix architectureAT & T GLOBAL INF SOLUTION·Filed 1995·Granted Aug 27, 1996·51 cites·15 claims
- 0981US4866601ADigital data bus architecture for computer disk drive controllerNCR CO·Filed 1987·Granted Sep 12, 1989·69 cites·6 claims
- 1078US4935868AMultiple port bus interface controller with slave busNCR CO·Filed 1988·Granted Jun 19, 1990·58 cites·20 claims
- 1177US5388108ADelayed initiation of read-modify-write parity operations in a raid level 5 disk arrayNCR CO·Filed 1992·Granted Feb 7, 1995·76 cites·7 claims
- 1273US5790794AVideo storage unit architectureSYMBIOS INC·Filed 1995·Granted Aug 4, 1998·41 cites·8 claims
- 1369US5418925AFast write I/O handling in a disk array using spare drive for bufferingAT & T GLOBAL INF SOLUTION·Filed 1992·Granted May 23, 1995·52 cites·13 claims
- 1454US6023754AMultiple channel data bus routing switching including parity generation capabilitiesHYUNDAI ELECTRONICS AMERICA·Filed 1994·Granted Feb 8, 2000·27 cites·7 claims
- 1543US5748871ADual bus architecture for a storage deviceSYMBIOS LOGIC INC·Filed 1995·Granted May 5, 1998·19 cites·26 claims
- 1632US4870616ACompact register set using a psram arrayNCR CO·Filed 1987·Granted Sep 26, 1989·2 cites·3 claims
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