Inventor

THOMA NANDOR G

US22 patents

⚠️ This page may combine multiple inventors who share the name “THOMA NANDOR G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

THOMA NANDOR G

IBM

V-MOS Device with self-aligned multiple electrodes

High speed pipeline method and apparatus

CMOS receiver circuit

CMOS driver circuit

Symmetric clock system for a data processing system including dynamically switchable frequency divider

Hierarchical clocking system using adaptive feedback

Bus line precharging tristate driver circuit

Electronically tuneable computer clocking system and method of electronically tuning distribution lines of a computer clocking system

Differential cascode voltage switch (DCVS) master slice for high efficiency/custom density physical design

Microword generation mechanism utilizing a separate branch decision programmable logic array

Clocking mechanism for multiple overlapped dynamic programmable logic arrays used in a digital control unit

Logic performing cell for use in array structures

Tristate driver circuit with low standby power consumption

Fully testable DCVS circuits with single-track global wiring

Large scale integration data processor signal transfer mechanism

Basic DCVS circuits with dual function load circuits

Programmable DCVS logic circuits

Logic performing cell for use in array structures

Integrated circuit mechanism for coupling multiple programmable logic arrays to a common bus

BAE SYSTEMS INFORMATION

Single-event upset tolerant latch for sense amplifiers

Ring oscillator providing single event transient immunity

THOMA NANDOR G

Apparatus and method for decoding an operation code using a plurality of multiplexed programmable logic arrays