Inventor · disambiguated record
Cher Liang Cha
Also filed as: CHA CHER LIANG · CHA CHER LIANG RANDALL · CHA RANDALL CHER LIANG · CHA RANDELL CHER-LIANG
26 granted patents·1 pending application·1,043 citations·filing 1998–2006
97Inventor score
Top patents by PatentIndex Score
27 records- 0198US6303418B1Method of fabricating CMOS devices featuring dual gate structures and a high dielectric constant gate insulator layerCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Oct 16, 2001·374 cites·28 claims
- 0291US6252277B1Embedded polysilicon gate MOSFETCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Jun 26, 2001·137 cites·28 claims
- 0389US6380084B1Method to form high performance copper damascene interconnects by de-coupling via and metal line fillingCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 30, 2002·59 cites·33 claims
- 0482US6140197AMethod of making spiral-type RF inductors having a high quality factor (Q)CHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Oct 31, 2000·61 cites·19 claims
- 0581US6221727B1Method to trap air at the silicon substrate for improving the quality factor of RF inductors in CMOS technologyCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Apr 24, 2001·66 cites·26 claims
- 0678US7573081B2Method to fabricate horizontal air columns underneath metal inductorCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Aug 11, 2009·7 cites·6 claims
- 0777US6501122B1Flash device having a large planar area ono interpoly dielectricCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Dec 31, 2002·20 cites·19 claims
- 0876US6207534B1Method to form narrow and wide shallow trench isolations with different trench depths to eliminate isolation oxide dishingCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Mar 27, 2001·53 cites·20 claims
- 0973US6297109B1Method to form shallow junction transistors while eliminating shorts due to junction spikingCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Oct 2, 2001·26 cites·16 claims
- 1071US6610575B1Forming dual gate oxide thickness on vertical transistors by ion implantationCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Aug 26, 2003·16 cites·47 claims
- 1171US6096604AProduction of reversed flash memory deviceCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Aug 1, 2000·34 cites·41 claims
- 1270US6051467AMethod to fabricate a large planar area ONO interpoly dielectric in flash deviceCHARTERED SEMICONDUCTOR MFG·Filed 1998·Granted Apr 18, 2000·26 cites·23 claims
- 1368US6605501B1Method of fabricating CMOS device with dual gate electrodeCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Aug 12, 2003·14 cites·36 claims
- 1466US6531750B2Shallow junction transistors which eliminating shorts due to junction spikingCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Mar 11, 2003·9 cites·10 claims
- 1563US6492242B1Method of forming of high K metallic dielectric layerCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Dec 10, 2002·8 cites·14 claims
- 1663US6326272B1Method for forming self-aligned elevated transistorCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Dec 4, 2001·19 cites·18 claims
- 1762US6150232AFormation of low k dielectricCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Nov 21, 2000·28 cites·54 claims
- 1861US6730571B1Method to form a cross network of air gaps within IMD layerCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted May 4, 2004·23 cites·23 claims
- 1960US6764914B2Method of forming a high K metallic dielectric layerCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Jul 20, 2004·6 cites·8 claims
- 2060US6680239B1Effective isolation with high aspect ratio shallow trench isolation and oxygen or field implantCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jan 20, 2004·10 cites·17 claims
- 2158US6518133B1Method for fabricating a small dimensional gate with elevated source/drain structuresCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Feb 11, 2003·8 cites·21 claims
- 2257US6483148B2Self-aligned elevated transistorCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Nov 19, 2002·6 cites·20 claims
- 2355US6064201AMethod and apparatus to image metallic patches embedded in a non-metal surfaceCHARTERED SEMICONDUCTOR MFG·Filed 1998·Granted May 16, 2000·20 cites·17 claims
- 2452US7112866B2Method to form a cross network of air gaps within IMD layerCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Sep 26, 2006·4 cites·4 claims
- 2542US7105420B1Method to fabricate horizontal air columns underneath metal inductorUNIV SINGAPORE·Filed 1999·Granted Sep 12, 2006·9 cites·19 claims
- 2639US6566209B2Method to form shallow junction transistors while eliminating shorts due to junction spikingCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted May 20, 2003·0 cites·7 claims
- 2732US2003107114A1Thermal circuitryFiled 2002·Application pending·0 cites
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