Inventor

FAHIM BAHAA

US33 patents

⚠️ This page may combine multiple inventors who share the name “FAHIM BAHAA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FAHIM BAHAA

INTEL CORP

Method and system for cache agent trace and capture

High performance interconnect

High performance interconnect

Providing common caching agent for core and integrated input/output (IO) module

Inclusive and non-inclusive tracking of local cache lines to avoid near memory reads on cache line memory writes into a two level system memory

High performance interconnect

High performance interconnect

High performance interconnect

Method and system for cache agent trace and capture

High performance interconnect

Pass through debug port on a high speed asynchronous link

Method, apparatus and system for modular on-die coherent interconnect for packetized communication

Core tightly coupled lockstep for high functional safety

Integrated input/output management

Virtual retry queue

Line swapping scheme to reduce back invalidations in a snoop filter

Redundant cache-coherent memory fabric

Optimized caching agent with integrated directory cache

Method, apparatus and system for handling cache misses in a processor

Granular cache repair

Method, apparatus and system for optimizing cache memory transaction handling in a processor

Method and apparatus for distributed snoop filtering

Caching agent for deadlock prevention in a processor by allowing requests that do not deplete available coherence resources

Partial way hint line replacement algorithm for a snoop filter

Hybrid directory and snoopy-based coherency to reduce directory update overhead in two-level memory

System and method for granular in-field cache repair

Mission-critical computing architecture

Ring protocol for low latency interconnect switch

Shared mesh

Clock signal modulation for processors

LIU YEN-CHENG

Providing common caching agent for core and integrated input/output (IO) module

BLANKENSHIP ROBERT G

Ring protocol for low latency interconnect switch

LIU YEN CHENG

Scalably mechanism to implement an instruction that monitors for writes to an address