Inventor
HOFLEHNER GEROLF F
US12 patents
⚠️ This page may combine multiple inventors who share the name “HOFLEHNER GEROLF F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
8 patentsUS7814469B2Oct 12, 2010
Speculative multi-threading for instruction prefetch and/or trace pre-build
INTEL CORP13 citations92
US7398521B2Jul 8, 2008
Methods and apparatuses for thread management of multi-threading
INTEL CORP26 citations92
US7228528B2Jun 5, 2007
Building inter-block streams from a dynamic execution trace for a program
INTEL CORP13 citations83
US6907601B1Jun 14, 2005
Method and apparatus for inserting more than one allocation instruction within a routine
INTEL CORP15 citations82
US7617495B2Nov 10, 2009
Resource-aware scheduling for compilers
INTEL CORP7 citations72
US9858057B2Jan 2, 2018
Methods and apparatus to validate translated guest code in a dynamic binary translator
INTEL CORP2 citations71
US9223553B2Dec 29, 2015
Methods and apparatus to validate translated guest code in a dynamic binary translator
INTEL CORP5 citations71
US7260705B2Aug 21, 2007
Apparatus to implement mesocode
INTEL CORP7 citations71