Inventor

HAGSPIEL NORBERT

DE31 patents

⚠️ This page may combine multiple inventors who share the name “HAGSPIEL NORBERT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HAGSPIEL NORBERT

IBM

Configurable ordering controller for coupling transactions

Resource allocation by virtual channel management and bus multiplexing

Write and read collision avoidance in single port memory devices

Method for sharing a translation lookaside buffer between CPUs

Increased bandwidth of ordered stores in a non-uniform memory subsystem

Increased bandwidth of ordered stores in a non-uniform memory subsystem

Data transfer using a descriptor

Operating on translation look-aside buffers in a multiprocessor environment

Input/output traffic backpressure prediction

Data transfer using a descriptor

Configurable ordering controller for coupling transactions

Resource allocation by virtual channel management and bus multiplexing

Combining peripheral component interface express partial store commands along cache line boundaries

Data transfer using a descriptor

Input/output traffic backpressure prediction

Method, system, and computer program product for implementing a dual-addressable cache

Multi-cycle key compares for keys and records of variable length

Buffer size optimization in a hierarchical structure

Sorting using pipelined compare units

Hierarchical sort/merge structure using a request pipe

Initializing I/O devices

Tracing data from an asynchronous interface

Array delete mechanisms for shipping a microprocessor with defective arrays

Data processing apparatus and method

GLOBALFOUNDRIES INC

Write and read collision avoidance in single port memory devices

Write and read collision avoidance in single port memory devices

FERTIG MATTHIAS

Translation lookaside buffer and related method and program product utilized for virtual addresses

DAIMLER CHRYSLER AG

Processor unit for a data-processing-aided electronic control system in a motor vehicle

HELLER LISA C

Providing multiple quiesce state machines in a computing environment

EASTON JANET R

Dequeue operation using mask vector to manage input/output interruptions

HAGSPIEL NORBERT

Memory ordered store system in a multiprocessor computer system