Inventor

SCHULTZ KEVIN L

US66 patents

⚠️ This page may combine multiple inventors who share the name “SCHULTZ KEVIN L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SCHULTZ KEVIN L

NAT INSTR CORP

System and method for deploying a graphical program on an image acquisition device

System and method of evaluating the performance of an image processing algorithm

System and method for configuring an instrument to perform measurement functions utilizing conversion of graphical programs into hardware implementations

System and method for automatically generating a graphical program to perform an image processing algorithm

PCI bus to IEEE 1394 bus translator

System and method for automatically generating a graphical program to implement a prototype

Smart camera with a plurality of slots for modular expansion capability through a variety of function modules connected to the smart camera

Locating regions in a target image using color matching, luminance pattern matching and hue plane pattern matching

PCI bus to IEEE 1394 bus translator employing write pipe-lining and sequential write combining

Pattern matching using multiple techniques

System and method for automatically creating a prototype to perform a process

Displaying operations in an application using a graphical programming representation

Machine vision system and method for analyzing illumination lines in an image to determine characteristics of an object being inspected

PCI bus to IEEE 1394 bus translator employing pipe-lined read prefetching

Smart camera with modular expansion capability including a function module that performs image processing

Smart camera with a plurality of slots for modular expansion capability through a variety of function modules connected to the smart camera

Image acquisition system and method for acquiring variable sized objects

Video acquisition system including a virtual dual ported memory with adaptive bandwidth allocation

Chassis which includes configurable slot 0 locations

System and method for coupling peripheral buses through a serial bus using a split bridge implementation

System and method for extracting and restoring a video buffer from/to a video acquisition cycle

System and method for specifying a machine vision process using different programming methodologies

System and method for specifying a computer-implemented process using different programming methodologies

Video acquisition system including an improved event architecture

Pattern matching method selection

IBM

Configurable door panels

Members and locks for securing devices and/or slots in a computer rack

Configurable door panels

Replacement of physical buttons with virtual controls

Replacement of physical buttons with virtual controls

Collapsible enclosure cover for facilitating air flow for an enclosure

Multiple-backplane implementations for modular platforms

Multi-panel server door

Multi-angled rack system door

Electronics rack door assembly with collapsible acoustical panel

Rack sidecar for additional IT equipment and cable management

Indicator module for modular computing units

Modular elements employing latches with flexure bearings

Rack sidecar for additional IT equipment and cable management

Collapsible enclosure cover for facilitating air flow for an enclosure

Multi-rack retractable door apparatus

Rack having a stowable retractable terminal for varying the positioning of input devices relative to the rest of the rack and/or a user

Rack-mountable assembly with spring-hinged mounting bracket(s)

Method and apparatus for the alignment and locking of removable elements with a connector

Modular enclosure elements employing cams forming detent features with latches

Configurable door panels

Electromagnetic noise signal based predictive analytics

Secure add-on brackets and bezel for locking devices and/or slots in a computer rack

CHANDHOKE SUNDEEP

System and method for configuring a hardware device to execute a prototype

NAT INSTRUMENTS CORP

Prototyping an image processing algorithm and emulating or simulating execution on a hardware accelerator to estimate resource usage or performance