Inventor

LEE KYEONGHO

KR65 patents

⚠️ This page may combine multiple inventors who share the name “LEE KYEONGHO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE KYEONGHO

GCT SEMICONDUCTOR INC

Single chip CMOS transmitter/receiver

Automatic gain control method for highly integrated communication receiver

Single chip CMOS transmitter/receiver

Variable gain low-noise amplifier for a wireless terminal

Mixer structure and method for using same

Phase lock loop (PLL) apparatus and method

Mixer structure and method of using same

Single chip CMOS transmitter/receiver and method of using same

Fractional-N frequency synthesizer with fractional compensation method

Single chip CMOS transmitter/receiver and method of using same

Phase lock loop (PLL) apparatus and method

Gm-C tuning circuit with filter configuration

Gm-C tuning circuit with filter configuration

Apparatus for measuring in-phase and quadrature (IQ) imbalance

LC oscillator with wide tuning range and low phase noise

RF front end with reduced carrier leakage

Sample and hold type fractional-N frequency synthesizer

System and method for suppressing noise in a phase-locked loop circuit

System and method for tuning a frequency generator using an LC oscillator

Clock generator and clock generating method using delay locked loop

Highly linear variable gain amplifier

Apparatus and method of oscillating wideband frequency

System and method for filtering signals in a transceiver

CMOS low noise amplifier

Automatic gain control loop apparatus

Communication transmitter using offset phase-locked-loop

Frequency synthesizer using two phase locked loops

Method for compensating for gain ripple and group delay characteristics of filter and receiving circuit embodying the same

Apparatus for measuring in-phase and quadrature (IQ) imbalance

Integrated circuit package having inductance loop formed from a bridge interconnect

SILICON IMAGE INC

Wide frequency-range delay-locked loop circuit

System for high speed serial video signal transmission using DC-balanced coding

Transition-controlled digital encoding and signal transmission system

Skew-insensitive low voltage differential receiver

High-speed and high-precision phase locked loop having phase detector with dynamic logic structure

System and method for high-speed skew-insensitive multi-channel data transmission

DC-balanced and transition-controlled encoding method and apparatus

High-speed and high-precision phase locked loop having phase detector with dynamic logic structure

Transition-controlled digital encoding and signal transmission system

Dual loop delay-locked loop

High-speed and high-precision phase locked loop

High-speed and high-precision phase locked loop

ANAPASS INC

Zero-delay buffer circuit for a spread spectrum clock system and method therefor

Zero-delay buffer circuit for a spread spectrum clock system and method therefor

GCT RES INC

Receiving circuit and method for compensating IQ mismatch

Tranceiver circuit for compensating IQ mismatch and carrier leakage and method for controlling the same

UNIV KOREA RES & BUS FOUND

In-memory computing device supporting arithmetic operations

Computing in-memory device supporting arithmetic operations and method of controlling the same

GLOBAL COMM TECHNOLOGY INC

VCO-mixer structure

LEE SEUNG-WOOK

OFDM receiving circuit having multiple demodulation paths using oversampling analog-to-digital converter