Inventor
CIAVAGLIA STEPHEN J
US12 patents
⚠️ This page may combine multiple inventors who share the name “CIAVAGLIA STEPHEN J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
7 patentsUS5615350AMar 25, 1997
Apparatus to dynamically control the out-of-order execution of load-store instructions in a processor capable of dispatching, issuing and executing multiple instructions in a single processor cycle
IBM149 citations97
US5666506ASep 9, 1997
Apparatus to dynamically control the out-of-order execution of load/store instructions in a processor capable of dispatchng, issuing and executing multiple instructions in a single processor cycle
IBM106 citations95
US5884061AMar 16, 1999
Apparatus to perform source operand dependency analysis perform register renaming and provide rapid pipeline recovery for a microprocessor capable of issuing and executing multiple instructions out-of-order in a single processor cycle
IBM97 citations92
US5625787AApr 29, 1997
Superscalar instruction pipeline using alignment logic responsive to boundary identification logic for aligning and appending variable length instructions to instructions stored in cache
IBM43 citations92
US5625789AApr 29, 1997
Apparatus for source operand dependendency analyses register renaming and rapid pipeline recovery in a microprocessor that issues and executes multiple instructions out-of-order in a single cycle
IBM77 citations92
US5644744AJul 1, 1997
Superscaler instruction pipeline having boundary identification logic for variable length instructions
IBM25 citations88
US5640526AJun 17, 1997
Superscaler instruction pipeline having boundary indentification logic for variable length instructions
IBM6 citations69
HEWLETT PACKARD CO
4 patentsUS5175829ADec 29, 1992
Method and apparatus for bus lock during atomic computer operations
HEWLETT PACKARD CO107 citations92
US5051885ASep 24, 1991
Data processing system for concurrent dispatch of instructions to multiple functional units
HEWLETT PACKARD CO40 citations91
US5193157AMar 9, 1993
Piplined system includes a selector for loading condition code either from first or second condition code registers to program counter
HEWLETT PACKARD CO45 citations90
US5045992ASep 3, 1991
Apparatus for executing instruction regardless of data types and thereafter selectively branching to other instruction upon determining of incompatible data type
HEWLETT PACKARD CO6 citations62