Inventor
JIANG HUNT HANG
US24 patents
⚠️ This page may combine multiple inventors who share the name “JIANG HUNT HANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
FUJITSU LTD
9 patentsUS6326555B1Dec 4, 2001
Method and structure of z-connected laminated substrate for high density electronic packaging
FUJITSU LTD93 citations98
US6054761AApr 25, 2000
Multi-layer circuit substrates and electrical assemblies having conductive composition connectors
FUJITSU LTD103 citations97
US6869750B2Mar 22, 2005
Structure and method for forming a multilayered structure
FUJITSU LTD62 citations96
US6271107B1Aug 7, 2001
Semiconductor with polymeric layer
FUJITSU LTD95 citations96
US6163957ADec 26, 2000
Multilayer laminated substrates with high density interconnects and methods of making the same
FUJITSU LTD138 citations95
US6428942B1Aug 6, 2002
Multilayer circuit structure build up method
FUJITSU LTD32 citations91
US7513037B2Apr 7, 2009
Method of embedding components in multi-layer circuit boards
FUJITSU LTD9 citations84
US6579474B2Jun 17, 2003
Conductive composition
FUJITSU LTD6 citations73
US6281040B1Aug 28, 2001
Methods for making circuit substrates and electrical assemblies
FUJITSU LTD6 citations73
MONOLITHIC POWER SYSTEMS INC
6 patentsUS10461052B2Oct 29, 2019
Copper structures with intermetallic coating for integrated circuit chips
MONOLITHIC POWER SYSTEMS INC3 citations73
US9754909B2Sep 5, 2017
Copper structures with intermetallic coating for integrated circuit chips
MONOLITHIC POWER SYSTEMS INC3 citations73
US9070671B2Jun 30, 2015
Microelectronic flip chip packages with solder wetting pads and associated methods of manufacturing
MONOLITHIC POWER SYSTEMS INC3 citations62
US8906797B2Dec 9, 2014
Microelectronic flip chip packages with solder wetting pads and associated methods of manufacturing
MONOLITHIC POWER SYSTEMS INC3 citations62
US8361899B2Jan 29, 2013
Microelectronic flip chip packages with solder wetting pads and associated methods of manufacturing
MONOLITHIC POWER SYSTEMS INC4 citations62
US10083930B2Sep 25, 2018
Semiconductor device reducing parasitic loop inductance of system
MONOLITHIC POWER SYSTEMS INC1 citations49
CHENGDU MONOLITHIC POWER SYS
5 patentsUS12266583B2Apr 1, 2025
Flip chip package unit and associated packaging method
CHENGDU MONOLITHIC POWER SYS0 citations57
US12159792B2Dec 3, 2024
Flip chip package unit comprising thermal protection film and associated packaging method
CHENGDU MONOLITHIC POWER SYS0 citations47
US11824001B2Nov 21, 2023
Integrated circuit package structure and integrated circuit package unit
CHENGDU MONOLITHIC POWER SYS0 citations47
US11670600B2Jun 6, 2023
Panel level metal wall grids array for integrated circuit packaging
CHENGDU MONOLITHIC POWER SYS0 citations47
US11616017B2Mar 28, 2023
Integrated circuit package structure, integrated circuit package unit and associated packaging method
CHENGDU MONOLITHIC POWER SYS0 citations47