Inventor

SYLVESTER MARK F

US22 patents

⚠️ This page may combine multiple inventors who share the name “SYLVESTER MARK F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SYLVESTER MARK F

GORE & ASS

Dimensionally stable core for use in high density chip packages and a method of fabricating same

Method for minimizing warp and die stress in the production of an electronic assembly

Chip package mounting structure for controlling warp of electronic assemblies due to thermal expansion effects

Method for minimizing warp and die stress in the production of an electronic assembly

Dimensionally stable core for use in high density chip packages

Method of increasing package reliability using package lids with plane CTE gradients

Substrate with die area having same CTE as IC

Method of increasing package reliability by designing in plane CTE gradients

Constraining ring for use in electronic packaging

Method of making a lid for a chip/package system

Integrated circuit chip package assembly

Apparatus and method for unit area composition control to minimize warp in an integrated circuit chip package assembly

Method for minimizing warp in the production of electronic assemblies

Method for controlling warp of electronic assemblies by use of package stiffener

Constraining ring for use in electronic packaging

GORE ENTERPRISE HOLDINGS INC

Method for assembling an integrated circuit chip package having an underfill material between a chip and a substrate

Method for assembling an integrated circuit chip package having at least one semiconductor device

Method for assembling an integrated circuit chip package having at least one semiconductor device

(unassigned)

Method for minimizing warp in the production of electronic assemblies

Constraining ring for use in electronic packaging

3M INNOVATIVE PROPERTIES CO

Interconnect module with reduced power distribution impedance

ROGERS CORP

Method of manufacture multichip module substrate