P

Inventor

SANE SANDEEP B

US24 patents
⚠️ This page may combine multiple inventors who share the name “SANE SANDEEP B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

20 patents
US7312527B2Dec 25, 2007

Low temperature phase change thermal interface material dam

INTEL CORP18 citations92
US6919224B2Jul 19, 2005

Modified chip attach process and apparatus

INTEL CORP19 citations92
US11557541B2Jan 17, 2023

Interconnect architecture with silicon interposer and EMIB

INTEL CORP6 citations85
US10325860B2Jun 18, 2019

Microelectronic bond pads having integrated spring structures

INTEL CORP2 citations73
US7901982B2Mar 8, 2011

Modified chip attach process

INTEL CORP4 citations73
US7579213B2Aug 25, 2009

Modified chip attach process

INTEL CORP4 citations73
US7304391B2Dec 4, 2007

Modified chip attach process and apparatus

INTEL CORP6 citations73
US9368461B2Jun 14, 2016

Contact pads for integrated circuit packages

INTEL CORP4 citations72
US9659899B2May 23, 2017

Die warpage control for thin die assembly

INTEL CORP2 citations70
US9953934B2Apr 24, 2018

Warpage controlled package and method for same

INTEL CORP4 citations69
US9659908B1May 23, 2017

Systems and methods for package on package through mold interconnects

INTEL CORP4 citations69
US12347783B2Jul 1, 2025

Interconnect architecture with silicon interposer and EMIB

INTEL CORP0 citations62
US11901299B2Feb 13, 2024

Interconnect architecture with silicon interposer and EMIB

INTEL CORP0 citations62
US11417592B2Aug 16, 2022

Methods of utilizing low temperature solder assisted mounting techniques for package structures

INTEL CORP0 citations62
US7166540B2Jan 23, 2007

Method for reducing assembly-induced stress in a semiconductor die

INTEL CORP3 citations62
US11824013B2Nov 21, 2023

Package substrate with reduced interconnect stress

INTEL CORP0 citations61
US11276625B2Mar 15, 2022

Methods of forming flexure based cooling solutions for package structures

INTEL CORP0 citations59
US10811366B2Oct 20, 2020

Microelectronic bond pads having integrated spring structures

INTEL CORP0 citations52
US9394619B2Jul 19, 2016

Methods of adding dopants to conductive interconnect structures in substrate technologies and structures formed thereby

INTEL CORP0 citations51
US11983135B2May 14, 2024

Electrical and optical interfaces at different heights along an edge of a package to increase bandwidth along the edge

INTEL CORP0 citations47

IBM

1 patent

CHANDRAN BIJU

1 patent

LIMAYE AMEYA

1 patent

SANE SANDEEP B

1 patent