Inventor

DOCZY MARK

US43 patents

⚠️ This page may combine multiple inventors who share the name “DOCZY MARK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DOCZY MARK

INTEL CORP

Method of forming metal gate electrodes using sacrificial gate electrode material and sacrificial gate dielectric material

Metal-gate electrode for CMOS transistor applications

Method for making a semiconductor device having a high-k gate dielectric

Nonplanar transistors with metal gate electrodes

Method of forming a metal oxide dielectric

Method for making a semiconductor device having a metal gate electrode

Integrating n-type and p-type metal gate transistors

Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication

Integrating n-type and p-type metal gate transistors

Transition metal alloys for use as a gate electrode and devices incorporating these alloys

integrating n-type and P-type metal gate transistors

Integrating n-type and p-type metal gate transistors

Nonplanar transistors with metal gate electrodes

Semiconductor device having a laterally modulated gate workfunction and method of fabrication

Semiconductor device having a laterally modulated gate workfunction and method of fabrication

Metal-gate electrode for CMOS transistor applications

Polysilicon opening polish

Tunable gate electrode work function material for transistor applications

Forming dual metal complementary metal oxide semiconductor integrated circuits

In-situ cleaning of light source collector optics

Hardmask gate patterning technique for all transistors using spacer gate approach for critical dimension control

Metalgate electrode for PMOS transistor

Preventing silicide formation at the gate electrode in a replacement metal gate technology

Forming dual metal complementary metal oxide semiconductor integrated circuits

Method for making a semiconductor device having a high-k gate dielectric

In-situ cleaning of light source collector optics

Polysilicon opening polish

Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication

Perpendicular spin transfer torque memory (pSTTM) devices with enhanced thermal stability and methods to form the same

Multi-level magnetic tunnel junction (MTJ) devices including mobile magnetic skyrmions or ferromagnetic domains

Self-aligned spin orbit torque (SOT) memory devices and their methods of fabrication

Transition metal alloys for use as a gate electrode and devices incorporating these alloys

Methods of forming a multilayer stack alloy for work function engineering

Methods of forming a multilayer stack alloy for work function engineering

Selectively depositing aluminum in a replacement metal gate process

Semiconductor device having a metal gate electrode

Magnetic tunnel junction (MTJ) devices with a synthetic antiferromagnet (SAF) structure including a magnetic skyrmion

Spin orbit torque (SOT) memory device with self-aligned contacts and their methods of fabrication

Spin orbit torque (SOT) memory devices with enhanced tunnel magnetoresistance ratio and their methods of fabrication

Spin transfer torque memory devices having heusler magnetic tunnel junctions

Perpendicular spin transfer torque magnetic mechanism

LAVOIE ADRIEN R

Tunable gate electrode work function material for transistor applications

PLANAR SYSTEMS INC

Deposition of carbon- and transition metal-containing thin films