Inventor
WILCOX JEFFREY R
US47 patents
⚠️ This page may combine multiple inventors who share the name “WILCOX JEFFREY R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
28 patentsUS7313712B2Dec 25, 2007
Link power saving state
INTEL CORP71 citations98
US6799241B2Sep 28, 2004
Method for dynamically adjusting a memory page closing policy
INTEL CORP162 citations98
US6820169B2Nov 16, 2004
Memory control with lookahead power management
INTEL CORP93 citations97
US8046488B2Oct 25, 2011
Dynamically modulating link width
INTEL CORP69 citations96
US6944084B2Sep 13, 2005
Memory system that measures power consumption
INTEL CORP65 citations96
US6510099B1Jan 21, 2003
Memory control with dynamic driver disabling
INTEL CORP53 citations96
US6330639B1Dec 11, 2001
Method and apparatus for dynamically changing the sizes of pools that control the power consumption levels of memory devices
INTEL CORP100 citations96
US6633178B2Oct 14, 2003
Apparatus and method for power efficient line driver
INTEL CORP45 citations94
US7610500B2Oct 27, 2009
Link power saving state
INTEL CORP17 citations92
US7315952B2Jan 1, 2008
Power state coordination between devices sharing power-managed resources
INTEL CORP19 citations92
US7000065B2Feb 14, 2006
Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiers
INTEL CORP16 citations91
US7886177B2Feb 8, 2011
Method and apparatus of collecting timer ticks
INTEL CORP8 citations84
US7007187B1Feb 28, 2006
Method and apparatus for an integrated circuit having flexible-ratio frequency domain cross-overs
INTEL CORP13 citations84
US7272741B2Sep 18, 2007
Hardware coordination of power management activities
INTEL CORP13 citations83
US7360103B2Apr 15, 2008
P-state feedback to operating system with hardware coordination
INTEL CORP14 citations82
US6842831B2Jan 11, 2005
Low latency buffer control system and method
INTEL CORP9 citations74
US6687172B2Feb 3, 2004
Individual memory page activity timing method and system
INTEL CORP7 citations74
US10228861B2Mar 12, 2019
Common platform for one-level memory architecture and two-level memory architecture
INTEL CORP2 citations73
US6970010B2Nov 29, 2005
Apparatus and method for power efficient line driver
INTEL CORP7 citations72
US11221762B2Jan 11, 2022
Common platform for one-level memory architecture and two-level memory architecture
INTEL CORP0 citations63
US7945793B2May 17, 2011
Interface frequency modulation to allow non-terminated operation and power reduction
INTEL CORP2 citations63
US6529442B1Mar 4, 2003
Memory controller with AC power reduction through non-return-to-idle of address and control signals
INTEL CORP5 citations63
US9195292B2Nov 24, 2015
Controlling reduced power states using platform latency tolerance
INTEL CORP2 citations61
US7257728B2Aug 14, 2007
Method and apparatus for an integrated circuit having flexible-ratio frequency domain cross-overs
INTEL CORP1 citations52
US9910771B2Mar 6, 2018
Non-volatile memory interface
INTEL CORP0 citations51
US9794349B2Oct 17, 2017
Dynamically modulating link width
INTEL CORP0 citations51
US9541983B2Jan 10, 2017
Controlling reduced power states using platform latency tolerance
INTEL CORP0 citations51
US9535829B2Jan 3, 2017
Non-volatile memory interface
INTEL CORP1 citations51
APPLE INC
13 patentsUS10671762B2Jun 2, 2020
Unified addressable memory
APPLE INC6 citations84
US11138346B2Oct 5, 2021
Unified addressable memory
APPLE INC4 citations73
US10318377B2Jun 11, 2019
Storing address of spare in failed memory location
APPLE INC1 citations73
US10042701B2Aug 7, 2018
Storing address of spare in failed memory location
APPLE INC2 citations73
US10747908B2Aug 18, 2020
Secure circuit control to disable circuitry
APPLE INC5 citations72
US10417429B2Sep 17, 2019
Method and apparatus for boot variable protection
APPLE INC2 citations68
US11263326B2Mar 1, 2022
Method and apparatus for secure system boot
APPLE INC2 citations67
US10929222B2Feb 23, 2021
Storing address of spare in failed memory location
APPLE INC0 citations63
US11714924B2Aug 1, 2023
Unified addressable memory
APPLE INC0 citations62
US11216054B2Jan 4, 2022
Techniques for adjusting computing device sleep states using onboard sensors and learned user behaviors
APPLE INC0 citations62
US11636801B2Apr 25, 2023
Computer console for throttling the video bitrate of video streams to interface with an electronic device
APPLE INC0 citations53
US10423212B2Sep 24, 2019
Techniques for adjusting computing device sleep states using onboard sensors and learned user behaviors
APPLE INC0 citations52
US11176280B2Nov 16, 2021
Secure circuit control to disable circuitry
APPLE INC0 citations51
WILCOX JEFFREY R
3 patentsUS8707072B2Apr 22, 2014
Interface frequency modulation to allow non-terminated operation and power reduction
WILCOX JEFFREY R3 citations61
US8176240B2May 8, 2012
Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiers
WILCOX JEFFREY R1 citations59
US10102157B2Oct 16, 2018
Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiers
WILCOX JEFFREY R0 citations49