Inventor

ARDANAZ FEDERICO

ES21 patents

⚠️ This page may combine multiple inventors who share the name “ARDANAZ FEDERICO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ARDANAZ FEDERICO

INTEL CORP

Implementing vector memory operations

Systems and methods for synergistic software-hardware power budget management

Systems and methods for synergistic software-hardware power budget management

Memory sequencing with coherent and non-coherent sub-systems

Hierarchical autonomous capacitance management

Voltage droop mitigation technology in array processor cores

Systems and methods for synergistic software-hardware power budget management

Hybrid prioritized resource allocation in thermally-or power-constrained computing devices

Hybrid prioritized resource allocation in thermally- or power-constrained computing devices

System-wide network activity forecasting for performance improvement

Power noise injection to control rate of change of current

Memory sequencing with coherent and non-coherent sub-systems

Dynamic maximum frequency limit for processing core groups

Techniques in performance and efficiency improvements of processors in a cooling system

Workload aware power limiting and multiple-input multiple-output control

Hybrid power management approach

Processor power monitoring and control with dynamic load balancing

Mitigating load imbalances through hierarchical performance balancing

Accurate voltage control to enhance power performance of circuits

ESPASA ROGER

Implementing vector memory operations

Implementing vector memory operations