Inventor
MOLLA JAYNAL A
US46 patents
⚠️ This page may combine multiple inventors who share the name “MOLLA JAYNAL A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NXP USA INC
20 patentsUS10141182B1Nov 27, 2018
Microelectronic systems containing embedded heat dissipation structures and methods for the fabrication thereof
NXP USA INC21 citations94
US10199303B1Feb 5, 2019
Molded air cavity packages and methods for the production thereof
NXP USA INC14 citations93
US10199302B1Feb 5, 2019
Molded air cavity packages and methods for the production thereof
NXP USA INC15 citations93
US10269678B1Apr 23, 2019
Microelectronic components having integrated heat dissipation posts, systems including the same, and methods for the fabrication thereof
NXP USA INC31 citations92
US10485091B2Nov 19, 2019
Microelectronic modules with sinter-bonded heat dissipation structures and methods for the fabrication thereof
NXP USA INC9 citations84
US11128268B1Sep 21, 2021
Power amplifier packages containing peripherally-encapsulated dies and methods for the fabrication thereof
NXP USA INC10 citations82
US9941210B1Apr 10, 2018
Semiconductor devices with protruding conductive vias and methods of making such devices
NXP USA INC7 citations80
US11749639B2Sep 5, 2023
Die-substrate assemblies having sinter-bonded backside via structures and associated fabrication methods
NXP USA INC2 citations73
US10529638B2Jan 7, 2020
Molded air cavity packages and methods for the production thereof
NXP USA INC1 citations72
US10396006B2Aug 27, 2019
Molded air cavity packages and methods for the production thereof
NXP USA INC1 citations72
US11616040B2Mar 28, 2023
Semiconductor dies having ultra-thin wafer backmetal systems, microelectronic devices containing the same, and associated fabrication methods
NXP USA INC2 citations71
US10861764B2Dec 8, 2020
Microelectronic components having integrated heat dissipation posts and systems including the same
NXP USA INC2 citations71
US10741446B2Aug 11, 2020
Method of wafer dicing for wafers with backside metallization and packaged dies
NXP USA INC2 citations71
US12094801B2Sep 17, 2024
Thick-silver layer interface
NXP USA INC0 citations63
US10825747B2Nov 3, 2020
Semiconductor device package and methods of manufacture thereof
NXP USA INC1 citations63
US10431449B2Oct 1, 2019
Microelectronic systems containing embedded heat dissipation structures and methods for the fabrication thereof
NXP USA INC1 citations62
US11437276B2Sep 6, 2022
Packaged dies with metal outer layers extending from die back sides toward die front sides
NXP USA INC0 citations61
US10923451B2Feb 16, 2021
Semiconductor dies having ultra-thin wafer backmetal systems, microelectronic devices containing the same, and associated fabrication methods
NXP USA INC0 citations60
US10727153B2Jul 28, 2020
Thick-silver layer interface
NXP USA INC0 citations52
US12482719B2Nov 25, 2025
Low-stress thermal interface
NXP USA INC0 citations49
FREESCALE SEMICONDUCTOR INC
12 patentsUS6936763B2Aug 30, 2005
Magnetic shielding for electronic circuits which include magnetic materials
FREESCALE SEMICONDUCTOR INC26 citations92
US6885074B2Apr 26, 2005
Cladded conductor for use in a magnetoelectronics device and method for fabricating the same
FREESCALE SEMICONDUCTOR INC21 citations92
US7598596B2Oct 6, 2009
Methods and apparatus for a dual-metal magnetic shield structure
FREESCALE SEMICONDUCTOR INC11 citations84
US6943038B2Sep 13, 2005
Method for fabricating a flux concentrating system for use in a magnetoelectronics device
FREESCALE SEMICONDUCTOR INC13 citations82
US6927072B2Aug 9, 2005
Method of applying cladding material on conductive lines of MRAM devices
FREESCALE SEMICONDUCTOR INC13 citations82
US9922894B1Mar 20, 2018
Air cavity packages and methods for the production thereof
FREESCALE SEMICONDUCTOR INC15 citations79
US9799580B2Oct 24, 2017
Semiconductor device package and methods of manufacture thereof
FREESCALE SEMICONDUCTOR INC2 citations73
US7105363B2Sep 12, 2006
Cladded conductor for use in a magnetoelectronics device and method for fabricating the same
FREESCALE SEMICONDUCTOR INC6 citations73
US9425161B2Aug 23, 2016
Semiconductor device with mechanical lock features between a semiconductor die and a substrate
FREESCALE SEMICONDUCTOR INC2 citations62
US9875987B2Jan 23, 2018
Electronic devices with semiconductor die attached with sintered metallic layers, and methods of formation of such devices
FREESCALE SEMICONDUCTOR INC0 citations52
US7402529B2Jul 22, 2008
Method of applying cladding material on conductive lines of MRAM devices
FREESCALE SEMICONDUCTOR INC0 citations51
US7279341B2Oct 9, 2007
Method for fabricating a flux concentrating system for use in a magnetoelectronics device
FREESCALE SEMICONDUCTOR INC0 citations50
IBM
8 patentsUS5185073AFeb 9, 1993
Method of fabricating nendritic materials
IBM173 citations98
US5435057AJul 25, 1995
Interconnection method and structure for organic circuit boards
IBM290 citations97
US5137461AAug 11, 1992
Separable electrical connection technology
IBM134 citations97
US5798050AAug 25, 1998
Process for fabrication of a selectively filled flexible adhesive device for solderless connection of electronic modules to a substrate
IBM50 citations96
US5298685AMar 29, 1994
Interconnection method and structure for organic circuit boards
IBM79 citations95
US5237743AAug 24, 1993
Method of forming a conductive end portion on a flexible circuit member
IBM69 citations94
US5910641AJun 8, 1999
Selectively filled adhesives for compliant, reworkable, and solder-free flip chip interconnection and encapsulation
IBM29 citations93
US5432998AJul 18, 1995
Method of solder bonding processor package
IBM40 citations92
VISWANATHAN LAKSHMINARAYAN
4 patentsUS9099567B2Aug 4, 2015
Packaged semiconductor devices and methods of their fabrication
VISWANATHAN LAKSHMINARAYAN13 citations83
US9589860B2Mar 7, 2017
Electronic devices with semiconductor die coupled to a thermally conductive substrate
VISWANATHAN LAKSHMINARAYAN4 citations73
US9538659B2Jan 3, 2017
Solder wettable flanges and devices and systems incorporating solder wettable flanges
VISWANATHAN LAKSHMINARAYAN6 citations73
US9698116B2Jul 4, 2017
Thick-silver layer interface for a semiconductor die and corresponding thermal layer
VISWANATHAN LAKSHMINARAYAN1 citations63