Inventor

CHAPMAN PHILLIP FRANCIS

US6 patents

⚠️ This page may combine multiple inventors who share the name “CHAPMAN PHILLIP FRANCIS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

5 patents

US7498622B1Mar 3, 2009

Latchup robust gate array using through wafer via

IBM23 citations91

US8021941B2Sep 20, 2011

Bias-controlled deep trench substrate noise isolation integrated circuit device structures

IBM4 citations61

US7855420B2Dec 21, 2010

CHAPMAN PHILLIP FRANCIS

1 patent

US8212332B2Jul 3, 2012

Bias-controlled deep trench substrate noise isolation integrated circuit device structures

CHAPMAN PHILLIP FRANCIS3 citations56

CHAPMAN PHILLIP FRANCIS

IBM

Latchup robust gate array using through wafer via

Bias-controlled deep trench substrate noise isolation integrated circuit device structures

Structure for a latchup robust array I/O using through wafer via

Structure for a latchup robust gate array using through wafer via

Latchup robust array I/O using through wafer via

CHAPMAN PHILLIP FRANCIS

Bias-controlled deep trench substrate noise isolation integrated circuit device structures