Inventor

CLAVELIER LAURENT

FR29 patents

⚠️ This page may combine multiple inventors who share the name “CLAVELIER LAURENT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CLAVELIER LAURENT

COMMISSARIAT ENERGIE ATOMIQUE

Method for producing Si1-yGey based zones with different contents in Ge on a same substrate by condensation of germanium

Method for manufacturing a SOI substrate associating silicon based areas and GaAs based areas

Heterogeneous substrate including a sacrificial layer, and a method of fabricating it

Method for producing Si1-yGey based zones with different contents in Ge on a same substrate by condensation of germanium

Fabrication method of a mixed substrate and use of the substrate for producing circuits

Method of producing a transistor

Three-dimensional integrated C-MOS circuit and method for producing same

Transistor of the I-MOS type comprising two independent gates and method of using such a transistor

Manufacturing method for a semi-conductor on insulator substrate comprising a localised Ge enriched step

Method for producing distinct first and second active semi-conducting zones and use thereof for fabricating C-MOS structures

Method of fabricating an electromechanical structure including at least one mechanical reinforcing pillar

Method for manufacturing a semiconductor-on-insulator substrate for microelectronics and optoelectronics

DEGUET CHRYSTEL

Acoustic wave device including a surface wave filter and a bulk wave filter, and method for making same

Method of transferring a thin film onto a support

Method for making a thin-film element

Data storage medium and associated method

FOURNEL FRANCK

Method in the microelectronics fields of forming a monocrystalline layer

Method of producing a hybrid substrate by partial recrystallization of a mixed layer

AUGENDRE EMMANUEL

Integrated circuit with electrostatically coupled MOS transistors and method for producing such an integrated circuit

BATUDE PERRINE

Circuit with transistors integrated in three dimensions and having a dynamically adjustable threshold voltage VT

TEMPLIER FRANCOIS

Method for manufacturing a very-high-resolution screen using a nanowire-based emitting anisotropic conductive film

CLAVELIER LAURENT

Method for transferring chips onto a substrate

COMMISSARIT A L EN ATOMIQUE

Method of fabricating a MEMS/NEMS electromechanical component

AVENAS YVAN

Electronic chip having channels through which a heat transport coolant can flow, electronic components and communication arm incorporating said chip

SIGNAMARCHEIX THOMAS

Method of producing a hybrid substrate having a continuous buried electrically insulating layer

ARENA CHANTAL

Epitaxial methods for reducing surface dislocation density in semiconductor materials

MAYER FREDERIC

Field effect transistor with alternate electrical contacts

ANDRIEU FRANÇOIS

Method of adjusting the threshold voltage of a transistor by a buried trapping layer

PERRUCHOT FRANCOIS

Method of fabricating an electromechanical device including at least one active element