Inventor
UPPAL SURESH
US12 patents
Patents
12 patentsUS10106892B1Oct 23, 2018
Thermal oxide equivalent low temperature ALD oxide for dual purpose gate oxide and method for producing the same
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US9372226B2Jun 21, 2016
Wafer test structures and methods of providing wafer test structures
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US10012687B2Jul 3, 2018
Methods, apparatus and system for TDDB testing
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US9916903B2Mar 13, 2018
OTPROM for post-process programming using selective breakdown
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US9702926B2Jul 11, 2017
Methods, apparatus and system for screening process splits for technology development
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US10181713B2Jan 15, 2019
Methods of post-process dispensation of plasma induced damage protection component
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US9460806B2Oct 4, 2016
Method for creating an OTPROM array possessing multi-bit capacity with TDDB stress reliability mechanism
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US9599656B2Mar 21, 2017
Methods, apparatus and system for voltage ramp testing
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US9500703B2Nov 22, 2016
Semiconductor structure having test device
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US10147496B2Dec 4, 2018
OTPROM for post-process programming using selective breakdown
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US10054630B2Aug 21, 2018
Methods, apparatus and system for screening process splits for technology development
GLOBALFOUNDRIES INC0 citations50
US9324822B2Apr 26, 2016
Gate dielectric protection for transistors
GLOBALFOUNDRIES INC0 citations39