Inventor
DARDEN RANDALL J
US7 patents
Patents
7 patentsUS9858377B2Jan 2, 2018
Constraint-driven pin optimization for hierarchical design convergence
IBM4 citations71
US10157255B2Dec 18, 2018
Hierarchically aware interior pinning for large synthesis blocks
IBM3 citations69
US9910952B2Mar 6, 2018
Hierarchically aware interior pinning for large synthesis blocks
IBM4 citations69
US9053285B2Jun 9, 2015
Thermally aware pin assignment and device placement
IBM3 citations61
US12547809B2Feb 10, 2026
Bit flip aware latch placement
IBM0 citations59
US9715572B2Jul 25, 2017
Hierarchical wire-pin co-optimization
IBM1 citations50
US9697322B2Jul 4, 2017
Hierarchical wire-pin co-optimization
IBM0 citations50