Inventor

MINKIN ILYA

US45 patents

⚠️ This page may combine multiple inventors who share the name “MINKIN ILYA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MINKIN ILYA

AMAZON TECH INC

Direct memory access operation for neural network accelerator

Low latency neural network model loading

Self-refill for instruction buffer

Strong ordered transaction for DMA transfers

Profiling and debugging for remote neural network execution

Synchronization of concurrent computation engines

Synchronization of concurrent computation engines

Runtime augmentation of engine instructions

Multidimensional and multiblock tensorized direct memory access descriptors

Dynamic code loading for multiple executions on a sequential processor

Tensorized direct memory access descriptors

Non-intrusive hardware profiling

Direct memory access operation for neural network accelerator

Dynamic code loading for multiple executions on a sequential processor

Overhead reduction using address translation in direct memory accesses

BOA TECH INC

Guides and components for closure systems and methods therefor

Systems, methods, and devices for automatic closure of medical devices

Reel based closure system employing a friction based tension mechanism

Devices and methods for tensioning apparel and other items

Guides and components for closure systems and methods therefor

Reel based closure system employing a friction based tension mechanism

Guides and components for closure systems and methods therefor

Reel based closure system

Reel based closure devices for tightening a ski boot

Guides and components for closure systems and methods therefor

Reel based closure system

Devices and methods for enhancing the fit of boots and other footwear

SONICWALL US HOLDINGS INC

Reassembly-free deep packet inspection on multi-core hardware

Reassembly-free deep packet inspection on multi-core hardware

Packet processing on a multi-core processor

Packet processing on a multi-core processor

DFA state association in a multi-processor system

Packet processing on a multi-core processor

VLEUGELS KATELIJN

Method and apparatus for synchronization of a master timebase with one or more slave timebases using indirect signalling of timing information

Method and apparatus for medium reservation and medium reservation modification in a communication system with medium reservation modification granted without requiring additional medium arbitration

Method and apparatus for scanning and device detection in a communication system

Method and apparatus for generation of a system master timebase of a computing device using indirect signalling of timing information

Method and apparatus for medium reservation and medium reservation modification in a communication system

SONICWALL INC

Packet processing on a multi-core processor

Packet processing on a multi-core processor

NETWORKS ASSOC TECH INC

System, method and computer program product for rule based network security policies

DUBROVSKY ALEKSANDR

Reassembly-free deep packet inspection on multi-core hardware

GMUENDER JOHN E

Packet processing on a multi-core processor

DELL SOFTWARE INC

Packet processing on a multi-core processor

ATMEL CORP

Method and apparatus for scanning and device detection in a communication system