P

Inventor

KWON UNOH

US94 patents
⚠️ This page may combine multiple inventors who share the name “KWON UNOH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

24 patents
US7838908B2Nov 23, 2010

Semiconductor device having dual metal gates and method of manufacture

IBM28 citations93
US9613866B2Apr 4, 2017

Gate stack formed with interrupted deposition processes and laser annealing

IBM11 citations92
US9613870B2Apr 4, 2017

Gate stack formed with interrupted deposition processes and laser annealing

IBM13 citations92
US9330938B2May 3, 2016

Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme

IBM12 citations92
US9515164B2Dec 6, 2016

Methods and structure to form high K metal gate stack with single work-function metal

IBM7 citations84
US9231072B2Jan 5, 2016

Multi-composition gate dielectric field effect transistors

IBM10 citations84
US9105745B2Aug 11, 2015

Fabrication of low threshold voltage and inversion oxide thickness scaling for a high-k metal gate p-type MOSFET

IBM13 citations84
US8912607B2Dec 16, 2014

Replacement metal gate structures providing independent control on work function and gate leakage current

IBM11 citations84
US8354313B2Jan 15, 2013

Method to optimize work function in complementary metal oxide semiconductor (CMOS) structures

IBM8 citations84
US9224826B2Dec 29, 2015

Multiple thickness gate dielectrics for replacement gate field effect transistors

IBM6 citations83
US7691701B1Apr 6, 2010

Method of forming gate stack and structure thereof

IBM16 citations83
US9824930B2Nov 21, 2017

Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme

IBM3 citations73
US9799656B2Oct 24, 2017

Semiconductor device having a gate stack with tunable work function

IBM3 citations73
US9583400B1Feb 28, 2017

Gate stack with tunable work function

IBM3 citations73
US9087722B2Jul 21, 2015

Semiconductor devices having different gate oxide thicknesses

IBM4 citations72
US11031301B2Jun 8, 2021

Gate formation scheme for n-type and p-type transistors having separately tuned threshold voltages

IBM0 citations63
US10985075B2Apr 20, 2021

Gate formation scheme for n-type and p-type transistors having separately tuned threshold voltages

IBM1 citations63
US10354999B2Jul 16, 2019

Structure and method to suppress work function effect by patterning boundary proximity in replacement metal gate

IBM1 citations63
US9997361B2Jun 12, 2018

Gate stack formed with interrupted deposition processes and laser annealing

IBM1 citations63
US9997610B2Jun 12, 2018

Gate stack formed with interrupted deposition processes and laser annealing

IBM1 citations63
US9721842B2Aug 1, 2017

Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme

IBM1 citations63
US9087784B2Jul 21, 2015

Structure and method of Tinv scaling for high k metal gate technology

IBM2 citations63
US9059313B2Jun 16, 2015

Replacement gate having work function at valence band edge

IBM2 citations63
US8809176B2Aug 19, 2014

Replacement gate with reduced gate leakage current

IBM2 citations63

GLOBALFOUNDRIES INC

11 patents

ANDO TAKASHI

6 patents

KWON UNOH

2 patents

LI ZHENGWEN

2 patents

BREIL NICOLAS

1 patent

UTOMO HENRY K

1 patent

ADAMS CHARLOTTE DEWAN

1 patent

CHUDZIK MICHAEL P

1 patent

GUO DECHAO

1 patent

Showing the top 50 of 94 patents by PatentIndex Score.