Inventor

BURR GEOFFREY W

US28 patents

⚠️ This page may combine multiple inventors who share the name “BURR GEOFFREY W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BURR GEOFFREY W

IBM

Reprogrammable fuse structure and method

Structure for confining the switching current in phase memory (PCM) cells

Phase change memory element and method of making the same

Method and structure for increasing effective transistor width in memory arrays with dual bitlines

Compensation of pixel misregistration in volume holographic data storage

Architectures for high-capacity content-addressable holographic databases

Reprogrammable fuse structure and method

Controlling aggregate signal amplitude from device arrays by segmentation and time-gating

Synaptic weight transfer between conductance pairs with polarity inversion for reducing fixed device asymmetries

Neural network circuits providing early integration before analog-to-digital conversion

Multiplexed phase-conjugate holographic data storage using a buffer hologram

Semiconductor device with a stoichiometric gradient

Encoding technique of data patterns to improve signal-to-noise ratio during cantent-addressable retrieval

Phase change memory element

System, method and article of manufacture for synchronization-free transmittal of neuron values in a hardware artificial neural networks

Synaptic weight transfer between conductance pairs with polarity inversion for reducing fixed device asymmetries

Competitive machine learning accuracy on neuromorphic arrays with non-ideal non-volatile memory devices

System, method and article of manufacture for synchronization-free transmittal of neuron values in a hardware artificial neural networks

Triage of training data for acceleration of large-scale machine learning

System and method for constructing synaptic weights for artificial neural networks from signed analog conductance-pairs of varying significance

Increasing effective transistor width in memory arrays with dual bitlines

Phase change memory element with phase-change electrodes

Fabrication of phase change memory element with phase-change electrodes using conformal deposition

System and method for transfer of analog synaptic weight information onto neuromorphic arrays with non-ideal non-volatile memory device

Temporal memory adapted for single-shot learning and disambiguation of multiple predictions

Controlling aggregate signal amplitude from device arrays by segmentation and time-gating

BURR GEOFFREY W

Non-volatile memory crosspoint repair

Reprogrammable fuse structure and method