Inventor

BICKSLER ANDREW

US34 patents

⚠️ This page may combine multiple inventors who share the name “BICKSLER ANDREW”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BICKSLER ANDREW

MICRON TECHNOLOGY INC

Minimizing adjacent wordline disturb in a memory device

Methods and apparatuses having strings of memory cells including a metal source

Minimizing adjacent wordline disturb in a memory device

Minimizing adjacent wordline disturb in a memory device

Memory array with an air gap between memory cells and the formation thereof

Back gates and related apparatuses, systems, and methods

Methods and apparatuses having strings of memory cells including a metal source

Semiconductor device structures and memory devices including a uniform pattern of conductive material

Data line management in a memory device

Dynamic step voltage level adjustment

Sense flags in a memory device

Back gates and related apparatuses, systems, and methods

Three dimensional memory

Three dimensional memory

Memory devices including gate leakage transistors

Microelectronic devices including an oxide material between adjacent decks

Microelectronic devices including an oxide material between adjacent decks, electronic systems, and related methods

Electronic devices including vertical strings of memory cells, and related memory devices, systems and methods

Sense flags in a memory device

Sense operation flags in a memory device

Sense operation flags in a memory device

Methods of programming memory devices

Three dimensional memory

BICKSLER ANDREW

Methods of forming semiconductor device structures and semiconductor device structures including a uniform pattern of conductive lines

Select gates for memory

NAND memory programming method using double vinhibit ramp for improved program disturb

Memory array with an air gap between memory cells and the formation thereof

Data line management in a memory device

Data line management in a memory device

Select gates for memory

GODA AKIRA

Data line management in a memory device

PUZZILLI GIUSEPPINA

Memory array having memory cells coupled between a programmable drain select gate and a non-programmable source select gate

LODESTAR LICENSING GROUP LLC

Microelectronic devices including oxide material between decks thereof, and related memory devices

AHMED SHAFQAT

Sense operation flags in a memory device