Inventor
SOUEF LAURENT
FR9 patents
⚠️ This page may combine multiple inventors who share the name “SOUEF LAURENT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
VLSI TECHNOLOGY INC
4 patentsUS6311318B1Oct 30, 2001
Design for test area optimization algorithm
VLSI TECHNOLOGY INC18 citations91
US5783874AJul 21, 1998
Keypad handling circuits
VLSI TECHNOLOGY INC8 citations72
US6141782AOct 31, 2000
Pseudo-scan testing using hardware-accessible IC structures
VLSI TECHNOLOGY INC5 citations60
US5960052ASep 28, 1999
Low power scannable counter
VLSI TECHNOLOGY INC6 citations60
NXP BV
3 patentsKONINKL PHILIPS ELECTRONICS NV
2 patentsUS6970815B1Nov 29, 2005
Method of discriminating between different types of scan failures, computer readable code to cause a display to graphically depict one or more simulated scan output data sets versus time and a computer implemented circuit simulation and fault detection system
KONINKL PHILIPS ELECTRONICS NV22 citations90
US6671870B2Dec 30, 2003
Computer implemented circuit synthesis system
KONINKL PHILIPS ELECTRONICS NV9 citations72