P

Inventor

RIEDLINGER REID JAMES

US16 patents
⚠️ This page may combine multiple inventors who share the name “RIEDLINGER REID JAMES”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HEWLETT PACKARD CO

10 patents
US6539457B1Mar 25, 2003

Cache address conflict mechanism without store buffers

HEWLETT PACKARD CO58 citations95
US6539466B1Mar 25, 2003

System and method for TLB buddy entry self-timing

HEWLETT PACKARD CO22 citations92
US6226217B1May 1, 2001

Register structure with a dual-ended write mechanism

HEWLETT PACKARD CO24 citations92
US6192001B1Feb 20, 2001

Integrated weak write test mode (WWWTM)

HEWLETT PACKARD CO19 citations92
US6507892B1Jan 14, 2003

L1 cache memory

HEWLETT PACKARD CO28 citations91
US6427189B1Jul 30, 2002

Multiple issue algorithm with over subscription avoidance feature to get high bandwidth through cache pipeline

HEWLETT PACKARD CO25 citations91
US6446187B1Sep 3, 2002

Virtual address bypassing using local page mask

HEWLETT PACKARD CO27 citations89
US6208565B1Mar 27, 2001

Multi-ported register structure utilizing a pulse write mechanism

HEWLETT PACKARD CO13 citations73
US6459304B1Oct 1, 2002

Latching annihilation based logic gate

HEWLETT PACKARD CO3 citations62
US6285579B1Sep 4, 2001

System and method for enabling/disabling SRAM banks for memory access

HEWLETT PACKARD CO4 citations62

HEWLETT PACKARD DEVELOPMENT CO

6 patents
US6557078B1Apr 29, 2003

Cache chain structure to implement high bandwidth low latency cache memory subsystem

HEWLETT PACKARD DEVELOPMENT CO32 citations92
US6873565B1Mar 29, 2005

Dual-ported read SRAM cell with improved soft error immunity

HEWLETT PACKARD DEVELOPMENT CO29 citations84
US6550034B1Apr 15, 2003

Built-in self test for content addressable memory

HEWLETT PACKARD DEVELOPMENT CO18 citations83
US6647464B2Nov 11, 2003

System and method utilizing speculative cache access for improved performance

HEWLETT PACKARD DEVELOPMENT CO13 citations82
US7698673B2Apr 13, 2010

Circuit and circuit design method

HEWLETT PACKARD DEVELOPMENT CO3 citations54
US6583650B2Jun 24, 2003

Latching annihilation based logic gate

HEWLETT PACKARD DEVELOPMENT CO0 citations51