Inventor

SCHROEDER STEPHAN

DE41 patents

⚠️ This page may combine multiple inventors who share the name “SCHROEDER STEPHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SCHROEDER STEPHAN

INFINEON TECHNOLOGIES AG

Device for cooling memory modules

DRAM memory with a shared sense amplifier structure

Voltage generator arrangement

Integrated semiconductor memory comprising at least one word line and method

Integrated memory using prefetch architecture and method for operating an integrated memory

Integrated memory and method for testing an integrated memory

Arrangement for determining a temperature loading of an integrated circuit and method

Method for operating a semiconductor memory and semiconductor memory

Integrated circuit for stabilizing a voltage

RAM store and control method therefor

Integrated DRAM semiconductor memory and method for operating the same

Voltage generator arrangement

Integrated circuit with actuation circuit for actuating a driver circuit

Integrated semiconductor memory and method for electrically stressing an integrated semiconductor memory

Integrated semiconductor memory and method for operating a semiconductor memory

Integrated semiconduct memory with test circuit

Integrated semiconductor memory comprising at least one word line and comprising a multiplicity of memory cells

Integrated memory having redundant units of memory cells and method for testing an integrated memory

Integrated semiconductor memory device and method for operating an integrated semiconductor memory device

Integrated memory

Circuit and method for controlling an access to an integrated memory

Circuit arrangement and method for setting a voltage supply for a read/write amplifier of an integrated memory

Integrated circuit, in particular integrated memory, and methods for operating an integrated circuit

Integrated semiconductor memory with redundant memory cells replaceable for either true or complementary defective memory cells

Integrated semiconductor circuit having a cell array having a multiplicity of memory cells

Integrated semiconductor circuit having a multiplicity of memory cells

Dynamic RAM semiconductor memory and method for operating the memory

Integrated memory and method for operating it

Integrated semiconductor memory circuit and a method for operating the same

Circuit configuration for controlling load-dependent driver strengths

Circuit configuration for the bit-parallel outputting of a data word

Field effect semiconductor switch and method for fabricating it

Integrated semiconductor memory and method for operating an integrated semiconductor memory

Integrated circuit for storing operating parameters

Integrated memory and method of repairing an integrated memory

QIMONDA AG

Method and apparatus for testing a memory chip using a common node for multiple inputs and outputs

Device for refreshing memory contents

Memory and method for improving the reliability of a memory having a used memory region and an unused memory region

Integrated device for simplified parallel testing, test board for testing a plurality of integrated devices, and test system and tester unit

SCHROEDER STEPHAN

Torque-limiting assembly for a surgical powertool

LANXESS DEUTSCHLAND GMBH

Polymer concentrates with improved processability