P

Inventor

OHLHOFF CARSTEN

DE17 patents

Patents

17 patents
US7231562B2Jun 12, 2007

Memory module, test system and method for testing one or a plurality of memory modules

INFINEON TECHNOLOGIES AG158 citations98
US6756787B2Jun 29, 2004

Integrated circuit having a current measuring unit

INFINEON TECHNOLOGIES AG21 citations92
US6671221B2Dec 30, 2003

Semiconductor chip with trimmable oscillator

INFINEON TECHNOLOGIES AG19 citations92
US7137049B2Nov 14, 2006

Method and apparatus for masking known fails during memory tests readouts

INFINEON TECHNOLOGIES AG11 citations84
US6504394B2Jan 7, 2003

Configuration for trimming reference voltages in semiconductor chips, in particular semiconductor memories

INFINEON TECHNOLOGIES AG18 citations83
US6661718B2Dec 9, 2003

Testing device for testing a memory

INFINEON TECHNOLOGIES AG12 citations74
US7120841B2Oct 10, 2006

Data generator for generating test data for word-oriented semiconductor memories

INFINEON TECHNOLOGIES AG8 citations73
US7107501B2Sep 12, 2006

Test device, test system and method for testing a memory circuit

INFINEON TECHNOLOGIES AG9 citations73
US6891431B2May 10, 2005

Integrated semiconductor circuit configuration

INFINEON TECHNOLOGIES AG8 citations73
US6657452B2Dec 2, 2003

Configuration for measurement of internal voltages of an integrated semiconductor apparatus

INFINEON TECHNOLOGIES AG11 citations73
US6670665B2Dec 30, 2003

Memory module with improved electrical properties

INFINEON TECHNOLOGIES AG5 citations63
US7490274B2Feb 10, 2009

Method and apparatus for masking known fails during memory tests readouts

INFINEON TECHNOLOGIES AG5 citations62
US7197678B2Mar 27, 2007

Test circuit and method for testing an integrated memory circuit

INFINEON TECHNOLOGIES AG6 citations62
US7092303B2Aug 15, 2006

Dynamic memory and method for testing a dynamic memory

INFINEON TECHNOLOGIES AG2 citations62
US6639856B2Oct 28, 2003

Memory chip having a test mode and method for checking memory cells of a repaired memory chip

INFINEON TECHNOLOGIES AG2 citations62
US6549028B1Apr 15, 2003

Configuration and process for testing a multiplicity of semiconductor chips on a wafer plane

INFINEON TECHNOLOGIES AG6 citations62
US7574643B2Aug 11, 2009

Test apparatus and method for testing a circuit unit

INFINEON TECHNOLOGIES AG0 citations43